Computer Architecture (CSC.T363) Support Page, Dept. of Computer Science TOKYO TECH

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Final Exam

• 2023-12-01 (13:30-15:10) final exam in the computer room of the department of computer science

Materials for Computer Architecture Exercise

• Exercise_1 2023-10-10 (15:25-17:05): Exercise(1) (UART, Input/Output)
• Exercise_2 2023-10-17 (15:25-17:05): Exercise(2) (UART, Program Loader, Single-cycle processor)
• Exercise_3 2023-10-24 (15:25-17:05): Exercise(3) (UART, Program Loader, Pipelined processor)
• Exercise_4 2023-11-07 (15:25-17:05): Exercise(4) (DRAM and cache)
• Exercise_5 2023-11-14 (15:25-17:05): Exercise(5) (Computer Design Contest)
• Exercise_6 2023-11-21 (15:25-17:05): Exercise(6), Contest Program
• Exercise_7 2023-11-28 (13:30-17:05): Computer Design Contest, Contest Sample pptx file

Lecture Slides and Materials

• Lecture_01 2023-10-03 (13:30-15:10): Guidance and Fundamentals of Computer Design
• Lecture_02 2023-10-06 (13:30-15:10): Trends in Performance and Power
• Lecture_03 2023-10-10 (13:30-15:10): Memory Technologies
• Lecture_04 2023-10-13 (13:30-15:10): Caches: Direct-Mapped
• Lecture_05 2023-10-17 (13:30-15:10): Caches: Set-Associative
• Lecture_06 2023-10-20 (13:30-15:10): Pipelined Processor (1) , proc5s.v , proc8s.v , asm.txt
• Lecture_07 2023-10-24 (13:30-15:10): Pipelined Processor (2)
• Lecture_08 2023-10-31 (13:30-15:10): Branch Prediction (1)
• Lecture_09 2023-11-07 (13:30-15:10): Branch Prediction (2)
• Lecture_10 2023-11-10 (13:30-15:10): Virtual Memory (1), Superscalar
• Lecture_11 2023-11-14 (13:30-15:10): Virtual Memory (2) and dependability
• Lecture_00 2023-11-17 (13:30-15:10): canceled
• Lecture_12 2023-11-21 (13:30-15:10): Data-Level Parallelism in Vector and SIMD, Input/Output and Bus
• Lecture_13 2023-11-24 (13:30-15:10): Interconnection Network, Multiprocessors and Multicore
• Lecture_14 2023-12-01 (13:30-15:10): Final Exam

• XDC file for nexys4 DDR (nexys4 A7) with XC7A100T-1CSG324C FPGA
• bitstream file for nexys4 DDR (nexys4 A7) with XC7A100T-1CSG324C FPGA

Link

• ACRi Room
• CSC.T341 Computer Logic Design Support Page
• Computer Room, Department of Computer Science
• RISC-V Assembly Programmer's Manual
• Venus RISC-V editor and simulator
• RV-PC: An open-source and GUI-capable RISC-V computer system
• CSC.T363 Computer Architecture Syllabus
• CSC.T252 Switching Circuit Theory
• Xilinx Vivado Design Suite
• Department of Computer Science, School of Computing, TOKYO TECH
• Kise Laboratory, TOKYO TECH

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