Link
Projects
- ACRi, Adaptive Computing Research Initiative
- CFU Proving Ground, RISC-V hardware-software co-design environment
- RV-PC, RISC-V Personal Computer Version 0.1
- RVCore, RISC-V Core Pipelined version Project
- RVSoC, a portable and Linux capable RISC-V computer system on an FPGA Project
- FTAC 2024, FPGA Technologies for Adaptive Computing
- FTAC 2021, Special Session on FPGA Technologies for Adaptive Computing
Obsolete projects and events
- RIDECORE (RIsc-v Dynamic Execution CORE)
- Frix, Feasible and Reconfigurable IBM PC Compatible SoC
- ScalableCore System, A Scalable Many-core Processor Simulator by Employing over 100 FPGAs
- M-Core project, an infrastructure to support research and education on many-core processors
- MieruPC project, a research and education project to build a MIERU computer system
- SimMips, a computer system simulator for the MIPS architecture
- SimCell, a simple Cell/B.E. simulator
- ALPS, International Workshop on Advanced Low Power Systems
- UPDAS, Workshop on Ultra Performance and Dependable Acceleration Systems
- The 1st IPSJ SIG-ARC High-Performance Processor Design Contest
Lectures
- CSC.T433 Advanced Computer Architecture
- CSC.T363 Computer Architecture
- CSC.T341 Computer Logic Design
Tokyo Tech Local (Members only)
- Laboratory Mattermost (Lab. members only)
- Laboratory Wiki (Lab. members only)
- Business cards and stationery templates
- Campus tennis court for staff members
- West 8E building 7th floor collaboration room reservation system
- SCIENCE TOKYO Portal