Support page of CSC.T440 Computer Organization and Architecture,Science Tokyo

News

• This page is open. (2025-12-04)

Lecture schecule and slides

• Lecture1 2025-12-04 13:30-15:10: Computer Organization and Architecture
• Lecture2 2025-12-11 13:30-15:10: Instruction Level Parallelism: Pipelining Processor and Branch Prediction
• Lecture3 2025-12-18 13:30-15:10: Instruction Level Parallelism: Register Renaming and Dynamic Scheduling
• Lecture4 2025-12-25 13:30-15:10: Instruction Level Parallelism: Multiple Issue, Speculation, and Out-of-order Execution
• Lecture5 2026-01-08 13:30-15:10: Thread Level Parallelism: Interconnection Network and Many-core Processors
• Lecture6 2026-01-22 13:30-15:10: Thread Level Parallelism: Coherence and Synchronization
• Lecture7 2026-01-29 13:30-15:10: Thread Level Parallelism: Memory Consistency Model
• Final Report by February 9, 2026

Lecture materials

• RISC-V Reference Card

Links

• CSC.T440 Computer Organization and Architecture Syllabus
• Venus RISC-V editor and simulator
• Icarus Verilog for Windows
• CSC.T363 Computer Architecture Support Page
• CSC.T341 Computer Logic Design Support Page
• Department of Computer Science, School of Computing, Science Tokyo
• Kise Laboratory, Science Tokyo
• Xilinx Vivado Design Suite
• ACRi Room

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