Kise Laboratory

Department of Computer Science, School of Computing, TOKYO TECH

This laboratory website has been renewed. For the time being, we will open only this English website.

Our paper "Dependency-Driven Trace-Based Network-on-Chip Emulation on FPGAs" has been accepted as a regular paper for FPGA 2020, which will be held in Seaside, California, USA. In this paper, we propose efficient methods and architectures to build a fast FPGA-based NoC emulator that supports trace-driven workloads with dependencies between packets taken into account. The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020) is the premier conference for presentation of advances in FPGA technology.

Our paper "A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath" has been accepted as a regular paper for FCCM 2018, which will be held in Boulder, CO, USA. This paper proposes a high-performance and cost-effective hardware merge sorter (HMS) without any feedback datapaths in order to develop the fastest hardware sorting accelerator.

We received the FCCM 2017 Best Paper Award. The IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM) is the original and premier forum for presenting and discussing new research related to computing that exploits the unique features and capabilities of FPGAs and other reconfigurable hardware.