------------------------------------------------------------ file name: sim.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 00006 /************************************************/ 00007 int main(int argc, char **argv){ 00008 printf("%s %s\n", NAME, VER); 00009 if(argc==1) usage(); 00010 char *p = argv[argc-1]; /* program name */ 00011 char **opt = argv; /* options */ 00012 00013 simple_chip *chip = new simple_chip(p, opt); 00014 while(chip->step()); 00015 delete chip; 00016 00017 return 0; 00018 } 00019 /************************************************/ ------------------------------------------------------------ file name: chip.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 00006 /************************************************/ 00007 simple_chip::simple_chip(char *prog, char **opt){ 00008 ev = new Env(); 00009 ev->sc = new system_config(prog, opt); 00010 ev->e = new evaluation_result(); 00011 ev->as = new architecture_state(ev); 00012 ev->mem = new memory_system(ev); 00013 ev->deb = new debug(ev); 00014 ev->sys = new system_manager(ev); 00015 p = new instruction(ev); 00016 } 00017 00018 simple_chip::~simple_chip(){ /** destructor **/ 00019 print_evaluation_result(ev); 00020 } 00021 00022 /************************************************/ 00023 int execute_cmovb(instruction *p, 00024 architecture_state *as){ 00025 INST_TYPE ir=cmov_ir_create(p->get_ir()); 00026 if(ir){ /** CMOVb inst, see README.txt **/ 00027 p->Fetch(&as->pc, ir); 00028 p->Slot(); 00029 p->Rename(); 00030 p->Issue(); 00031 p->RegisterRead(); 00032 p->Execute(&as->pc); 00033 p->Memory(); 00034 p->WriteBack(); 00035 } 00036 return 0; 00037 } 00038 00039 /************************************************/ 00040 int simple_chip::step(){ 00041 p->Fetch(&ev->as->pc); /* pipeline stage 0 */ 00042 p->Slot(); /* pipeline stage 1 */ 00043 p->Rename(); /* pipeline stage 2 */ 00044 p->Issue(); /* pipeline stage 3 */ 00045 p->RegisterRead(); /* pipeline stage 4 */ 00046 p->Execute(&ev->as->pc); /* pipeline stage 5 */ 00047 p->Memory(); /* pipeline stage 6 */ 00048 p->WriteBack(); 00049 00050 /* split a conditional move,see README.txt */ 00051 execute_cmovb(p, ev->as); 00052 00053 ev->e->retired_inst++; 00054 house_keeper(ev); 00055 00056 return ev->sys->running; 00057 } 00058 /************************************************/ ------------------------------------------------------------ file name: instruction.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 00006 /************************************************/ 00007 instruction::instruction(Env *ev_t){ 00008 ev = ev_t; 00009 } 00010 00011 /************************************************/ 00012 INST_TYPE instruction::get_ir(){ 00013 return ir; 00014 } 00015 00016 /************************************************/ 00017 int instruction::Fetch(data_t *pc){ 00018 ev->mem->ld_inst(pc, &ir); 00019 Cpc.init(pc->ld()); 00020 Npc.init(pc->ld() + 4); 00021 return 0; 00022 } 00023 00024 /** CMOVb case, npc and pc has the same value **/ 00025 /************************************************/ 00026 int instruction::Fetch(data_t *pc, INST_TYPE t){ 00027 ir = t; 00028 Cpc.init(pc->ld()); 00029 Npc.init(pc->ld()); 00030 return 0; 00031 } 00032 00033 /** Decode IR **/ 00034 /************************************************/ 00035 int instruction::Slot(){ 00036 Op = (ir>>26) & 0x3F; 00037 RA = (ir>>21) & 0x1F; 00038 RB = (ir>>16) & 0x1F; 00039 RC = (ir ) & 0x1F; 00040 WF = ((Op&MSK2)==0x14 || (Op&MSK2)==0x20); 00041 LA = (Op==0x08 || Op==0x09); 00042 LD = (Op==0x0a || Op==0x0b || Op==0x0c || 00043 (Op&MSK2)==0x20 || (Op&MSK2)==0x28); 00044 ST = (Op==0x0d || Op==0x0e || Op==0x0f || 00045 (Op&MSK2)==0x24 || (Op&MSK2)==0x2c); 00046 BR = ((Op&MSK4)==0x30); 00047 WB = (LD || (Op&MSK2)==0x08 || Op==0x1a || 00048 Op==0x30 || Op==0x34) ? RA : 00049 ((Op&MSK3)==0x10 || Op==0x1c) ? RC : 31; 00050 Af = (Op==0x15 || Op==0x16 || Op==0x17 || 00051 Op==0x1c || 00052 (Op&MSK2)==0x24 || (Op&MSK3)==0x30); 00053 Bf = ((Op&MSK2)==0x14); 00054 Ai = (Op==0x08 || Op==0x09 || LD); 00055 Bi = (BR || (Op&MSK2)==0x10 && (ir & BIT12)); 00056 00057 /** For the CMOV Split Code (CMOV1) **/ 00058 CM = 0; 00059 if(cmov_ir_create(ir)){ 00060 CM = 1; /* This is a cmov inst. */ 00061 RB = RC; 00062 Bi = 0; 00063 } 00064 return 0; 00065 } 00066 00067 /************************************************/ 00068 int instruction::Rename(){ 00069 return 0; 00070 } 00071 00072 /** genarate the immediate data Imm **/ 00073 /************************************************/ 00074 int instruction::Issue(){ 00075 DATA_TYPE Lit, D16, D21, tmp, d21e, d16e; 00076 d21e = ((ir & MASK21) | EXTND21) << 2; 00077 d16e = (ir & MASK16) | EXTND16; 00078 00079 Lit = (ir>>13) & 0xFF; 00080 D21 = (ir & BIT20) ? d21e : (ir&MASK21)<<2; 00081 D16 = (ir & BIT15) ? d16e : (ir&MASK16); 00082 if(Op==0x09) D16 = (D16 << 16); 00083 00084 tmp = (LA||LD||ST) ? D16 : (BR) ? D21 : Lit; 00085 Imm.init(tmp); 00086 return 0; 00087 } 00088 00089 /** copy data to Rav and Rbv **/ 00090 /************************************************/ 00091 int instruction::RegisterRead(){ 00092 architecture_state *as = ev->as; 00093 Rav = Ai ? Imm : Af ? as->f[RA] : as->r[RA]; 00094 Rbv = Bi ? Imm : Bf ? as->f[RB] : as->r[RB]; 00095 return 0; 00096 } 00097 00098 /** Updata Rcv, Adr and Tpc **/ 00099 /************************************************/ 00100 int instruction::Execute(data_t *Tpc){ 00101 /*** Update Rcv ***/ 00102 if(BR || Op==OP_JSR){ 00103 Rcv.init(Cpc.ld()+4); 00104 } 00105 else if(!LD){ 00106 ALU(ir, &Rav, &Rbv, &Rcv); 00107 } 00108 00109 /*** Update Adr ***/ 00110 Adr.init(0); 00111 if(LD || ST){ 00112 ALU(ir, &Imm, &Rbv, &Adr); 00113 } 00114 00115 /*** Update Npc ***/ 00116 if(Op==OP_JSR){ 00117 Npc = Rbv; 00118 Npc.st(Npc.ld() & ~3ull); 00119 } 00120 if(BR){ 00121 data_t tmp; 00122 tmp.init(Cpc.ld()+4); 00123 BRU(ir, &Rav, &Rbv, &tmp, &Npc); 00124 } 00125 *Tpc = Npc; 00126 00127 return 0; 00128 } 00129 00130 /** store Rav to mem or load to Rcv **/ 00131 /************************************************/ 00132 int instruction::Memory(){ 00133 if(ST){ 00134 data_t tmp; 00135 DATA_TYPE mask; 00136 set_st_data(ir, &Adr, &Rav, &tmp, &mask); 00137 ev->mem->st_8byte(&Adr, &tmp, mask); 00138 } 00139 if(LD){ 00140 data_t tmp; 00141 ev->mem->ld_8byte(&Adr, &tmp); 00142 set_ld_data(ir, &Adr, &tmp, &Rcv); 00143 } 00144 return 0; 00145 } 00146 00147 /** PAL or copy Rcv into the regfile **/ 00148 /************************************************/ 00149 int instruction::WriteBack(){ 00150 if(Op==OP_PAL){ 00151 ev->sys->execute_pal(this); 00152 } 00153 00154 if(!WF && WB!=31) ev->as->r[WB] = Rcv; 00155 if( WF && WB!=31) ev->as->f[WB] = Rcv; 00156 return 0; 00157 } 00158 /************************************************/ ------------------------------------------------------------ file name: memory.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 00006 /************************************************/ 00007 int nbyte(INST_TYPE ir){ 00008 int Op = (ir>>26) & 0x3F; 00009 int n = (Op==0x0e || Op==0x0a) ? 1 : 00010 (Op==0x0d || Op==0x0c) ? 2 : 00011 (Op==0x22 || Op==0x26 || Op==0x28 || Op==0x2a 00012 || Op==0x2c || Op==0x2e) ? 4 : 8; 00013 return n; 00014 } 00015 00016 /************************************************/ 00017 void set_st_data(INST_TYPE ir, data_t *adr, 00018 data_t *in, data_t *out, 00019 DATA_TYPE *msk){ 00020 DATA_TYPE a = adr->ld(); 00021 int Op = (ir>>26) & 0x3F; 00022 DATA_TYPE tmp = in->ld(); 00023 if(Op==0x26){ /***** STS *****/ 00024 DATA_TYPE Rav_t; 00025 uint_32t int_tmp = 0; 00026 int_tmp = 0; 00027 int_tmp |= ((tmp >> 29) & 0x3FFFFFFFul); 00028 int_tmp |= ((tmp >> 32) & 0xc0000000ul); 00029 memcpy(&Rav_t, &int_tmp, 4); 00030 tmp = (Rav_t & MASK32); 00031 } 00032 00033 int n = nbyte(ir); 00034 int offset = a & 7; 00035 if(n==8) *msk = 0; 00036 else if(n==4){ 00037 *msk = ~(MASK32 << offset*8); 00038 tmp = (tmp & MASK32) << offset*8; 00039 } 00040 else if(n==2){ 00041 *msk = ~(MASK16 << offset*8); 00042 tmp = (tmp & MASK16) << offset*8; 00043 } 00044 else if(n==1){ 00045 *msk = ~(MASK08 << offset*8); 00046 tmp = (tmp & MASK08) << offset*8; 00047 } 00048 out->st(tmp); 00049 } 00050 00051 /************************************************/ 00052 void set_ld_data(INST_TYPE ir, data_t *adr, 00053 data_t *in, data_t *out){ 00054 DATA_TYPE a = adr->ld(); 00055 DATA_TYPE tmp=in->ld(); 00056 int offset = a & 7; 00057 int n = nbyte(ir); 00058 if(n==4) tmp = (tmp >> (offset * 8)) & MASK32; 00059 if(n==2) tmp = (tmp >> (offset * 8)) & MASK16; 00060 if(n==1) tmp = (tmp >> (offset * 8)) & MASK08; 00061 00062 int Op = (ir>>26) & 0x3F; 00063 if(Op==0x28 || Op==0x2a){ /** LDL & LDL_L **/ 00064 DATA_TYPE Rcv_t = tmp; 00065 if(Rcv_t & BIT31) Rcv_t|=EXTND32; 00066 out->st(Rcv_t); 00067 } 00068 else if(Op==0x22){ /** LDS **/ 00069 DATA_TYPE rt = tmp; 00070 rt = (tmp >> 31) & 0x1ull; 00071 rt = (rt << 11) | (map_s(tmp) & 0x7ffull); 00072 rt = (rt << 23) | (tmp & 0x7FFFFFull); 00073 rt = rt << 29; 00074 out->st(rt); 00075 } 00076 else { 00077 out->st(tmp); 00078 } 00079 } 00080 00081 /************************************************/ 00082 inline uint_32t MM_TABLE_INDEX(uint_32t addr){ 00083 return (addr >> BLOCK_MASK_BIT); 00084 } 00085 00086 inline uint_32t gen_tag(uint_32t adr){ 00087 return (adr & 0xffffffc0); 00088 } 00089 00090 /************************************************/ 00091 void memory_system::ld_inst(data_t *a, 00092 INST_TYPE *ir){ 00093 data_t d; 00094 mm->ld_8byte(a, &d); 00095 if(a->ld()%8==0) *ir = d.ld() & MASK32; 00096 if(a->ld()%8==4) *ir = (d.ld()>>32) & MASK32; 00097 } 00098 00099 /************************************************/ 00100 void memory_system::ld_8byte(data_t *a, data_t *d){ 00101 mm->ld_8byte(a, d); 00102 } 00103 00104 void memory_system::st_8byte(data_t *a, data_t *d, 00105 DATA_TYPE msk){ 00106 mm->st_8byte(a, d, msk); 00107 } 00108 00109 /************************************************/ 00110 memory_system::~memory_system(){} 00111 00112 /************************************************/ 00113 memory_system::memory_system(Env *ev_t){ 00114 ev = ev_t; 00115 mm = new main_memory(ev); 00116 00117 char *prog_name = ev->sc->program_name; 00118 00119 /*** Read memory image from the file ***/ 00120 FILE *fp; 00121 if((fp = fopen(prog_name, "r")) == NULL) { 00122 fprintf(stderr, "Bad file name: %s\n", 00123 prog_name); 00124 exit(1); 00125 } 00126 char buf[4096]; 00127 fgets(buf, 4096, fp); /** File Format Check **/ 00128 if(strncmp(buf+3, "SimAlpha", 8)){ 00129 fprintf(stderr, "%s: Not a SimAlpha file.\n", 00130 prog_name); 00131 exit(1); 00132 } 00133 while(!feof(fp)){ 00134 fgets(buf, 4096, fp); 00135 if(*buf=='@'){ 00136 00137 int ost=0; /* find the offset of dat */ 00138 for(int i=0; i<32; i++){ 00139 if(*(buf+i)==' '){ ost=i; break; } 00140 } 00141 00142 ADDR_TYPE adr = get_hex(buf+1); 00143 DATA_TYPE dat = get_hex(buf+ost+1); 00144 data_t a,d; 00145 a.init(adr); 00146 d.init(dat); 00147 mm->st_8byte(&a, &d, 0); 00148 } 00149 } 00150 fclose(fp); 00151 } 00152 00153 /************************************************/ 00154 void memory_system::ld_nbyte(int n, data_t *a, 00155 data_t *d){ 00156 if(a->ld()%n!=0) 00157 printf("*** ld_nbyte %d miss-align.\n", n); 00158 if(n!=1 && n!=2 && n!=4 && n!=8) 00159 printf("*** Error in ld_nbyte %d.\n", n); 00160 00161 ld_8byte(a, d); /** Type Conversion **/ 00162 if(n==8) return; 00163 00164 int offset = a->ld() & 7; 00165 if(n==4){ 00166 DATA_TYPE dt = (d->ld()>>(offset*8))&MASK32; 00167 d->st(dt); 00168 } 00169 else if(n==2){ 00170 DATA_TYPE dt = (d->ld()>>(offset*8))&MASK16; 00171 d->st(dt); 00172 } 00173 else if(n==1){ 00174 DATA_TYPE dt = (d->ld()>>(offset*8))&MASK08; 00175 d->st(dt); 00176 } 00177 } 00178 00179 /************************************************/ 00180 void memory_system::st_nbyte(int n, data_t *a, 00181 data_t *d){ 00182 if(a->ld()%n!=0) 00183 printf("*** st_nbyte %d miss-alig.\n", n); 00184 if(n!=1 && n!=2 && n!=4 && n!=8) 00185 printf("*** Error in st_nbyte %d.\n", n); 00186 00187 int offset = a->ld() & 7; 00188 DATA_TYPE mask=0; 00189 00190 if(n==4){ 00191 mask = ~(MASK32 << offset*8); 00192 DATA_TYPE dt = (d->ld()&MASK32)<st(dt); 00194 } 00195 else if(n==2){ 00196 mask = ~(MASK16 << offset*8); 00197 DATA_TYPE dt = (d->ld()&MASK16)<st(dt); 00199 } 00200 else if(n==1){ 00201 mask = ~(MASK08 << offset*8); 00202 DATA_TYPE dt = (d->ld()&MASK08)<st(dt); 00204 } 00205 00206 st_8byte(a, d, mask); /** Type Conversion **/ 00207 } 00208 00209 /************************************************/ 00210 main_memory::main_memory(Env *ev_t){ 00211 ev = ev_t; 00212 for(int i=0; ild())]=ret; 00223 if(ret==NULL){ 00224 printf("** Error in allocblock.\n"); 00225 exit(0); 00226 } 00227 ev->e->used_memory_block++; 00228 return ret; 00229 } 00230 00231 void main_memory::ld_8byte(data_t *a, data_t *d){ 00232 ADDR_TYPE adr = a->ld() & ~7ull; 00233 data_t *ptr = block_table[MM_TABLE_INDEX(adr)]; 00234 int offset = (adr & BLOCK_MASK)/DATA_T_SIZE; 00235 if(ptr==NULL) ptr=allocblock(a); 00236 *d = *(ptr + offset); /** COPY **/ 00237 } 00238 00239 void main_memory::st_8byte(data_t *a, data_t *d, 00240 DATA_TYPE msk){ 00241 ADDR_TYPE adr = a->ld() & ~7ull; 00242 data_t *ptr = block_table[MM_TABLE_INDEX(adr)]; 00243 int offset = (adr & BLOCK_MASK)/DATA_T_SIZE; 00244 if(ptr==NULL) ptr=allocblock(a); 00245 (ptr + offset)->st( ((ptr + offset)->ld() 00246 & msk) | d->ld() ); 00247 } 00248 /************************************************/ ------------------------------------------------------------ file name: arithmetic.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 00006 /** 64 bit multiply Input of A and B **/ 00007 /** output of High 64b and Low 64b **/ 00008 /************************************************/ 00009 void mul128(DATA_TYPE a, DATA_TYPE b, 00010 DATA_TYPE *rh, DATA_TYPE *rl){ 00011 DATA_TYPE ah,al, bh, bl; 00012 DATA_TYPE x,y,z; 00013 int carry=0; /* has a value of 0, 1 or 2 */ 00014 00015 ah = a >> 32; 00016 al = a & 0xFFFFFFFF; 00017 00018 bh = b >> 32; 00019 bl = b & 0xFFFFFFFF; 00020 00021 x = al*bl; 00022 y = (al*bh << 32); 00023 z = x + y; 00024 if(z> 32)+(ah*bl >> 32)+carry; 00032 } 00033 00034 /** calculate taken or not-taken for branch **/ 00035 /************************************************/ 00036 int Condition(int code, DATA_TYPE Rav){ 00037 int taken=0; 00038 double Fav=0.0; 00039 // signal(SIGFPE, (void *)signal_float_branch); 00040 switch(code){ 00041 case 0x0: taken = 1; break; 00042 case 0x4: taken = 1; break; 00043 case 0x9: taken = (Rav==0); break; 00044 case 0xe: taken = ((int_64t)Rav>=0); break; 00045 case 0xf: taken = ((int_64t)Rav>0); break; 00046 case 0x8: taken = (!(Rav & 1)); break; 00047 case 0xc: taken = ( Rav & 1 ); break; 00048 case 0xb: taken = ((int_64t)Rav<=0); break; 00049 case 0xa: taken = ((int_64t)Rav<0 ); break; 00050 case 0xd: taken = (Rav!=0); break; 00051 00052 case 0x1: 00053 memcpy(&Fav,&Rav,8); taken=(Fav==0.0); break; 00054 case 0x2: 00055 memcpy(&Fav,&Rav,8); taken=(Fav< 0.0); break; 00056 case 0x3: 00057 memcpy(&Fav,&Rav,8); taken=(Fav<=0.0); break; 00058 case 0x5: 00059 memcpy(&Fav,&Rav,8); taken=(Fav!=0.0); break; 00060 case 0x6: 00061 memcpy(&Fav,&Rav,8); taken=(Fav>=0.0); break; 00062 case 0x7: 00063 memcpy(&Fav,&Rav,8); taken=(Fav> 0.0); break; 00064 default: 00065 fprintf(stderr, "*** ex_branch default!\n"); 00066 } 00067 // signal(SIGFPE, SIG_IGN); 00068 return taken; 00069 } 00070 00071 /** Jump & Branch Unit, Update TPC **/ 00072 /************************************************/ 00073 int BRU(INST_TYPE ir, data_t *R1, data_t *R2, 00074 data_t *npc, data_t *tpc){ 00075 int Op = (ir>>26) & 0x3F; 00076 tpc->st(Condition(Op&0xF, R1->ld()) ? 00077 npc->ld() + R2->ld() : npc->ld()); 00078 return 0; 00079 } 00080 00081 /************************************************/ 00082 int MUL_value(INST_TYPE ir, DATA_TYPE Rav, 00083 DATA_TYPE Rbv, DATA_TYPE *W){ 00084 DATA_TYPE Rcv, tmp2, tmp3; 00085 int func7 = (ir>>5) & 0x7f; 00086 00087 switch(func7){ 00088 case 0x00: /*__MULL; */ 00089 Rcv = (Rav*Rbv) & 0x00000000FFFFFFFFllu; 00090 if(Rcv & BIT31) Rcv |= EXTND32; 00091 break; 00092 00093 case 0x20: /*__MULQ; */ 00094 mul128(Rav, Rbv, &tmp2, &tmp3); 00095 Rcv = tmp3; 00096 break; 00097 00098 case 0x30: /*__UMULH; */ 00099 mul128(Rav, Rbv, &tmp2, &tmp3); 00100 Rcv = tmp2; 00101 break; 00102 00103 default: 00104 printf("** Warning Code 0x13. f:%x\n",func7); 00105 Rcv = 0; 00106 } 00107 00108 *W = Rcv; 00109 return 0; 00110 } 00111 00112 /** Rc <- BYTE_ZAP(Rav, byte_mask) **/ 00113 /************************************************/ 00114 uint_64t byte_zap(uint_64t Rav, int byte_mask){ 00115 if(byte_mask & BIT0) Rav &= ZAP0; 00116 if(byte_mask & BIT1) Rav &= ZAP1; 00117 if(byte_mask & BIT2) Rav &= ZAP2; 00118 if(byte_mask & BIT3) Rav &= ZAP3; 00119 if(byte_mask & BIT4) Rav &= ZAP4; 00120 if(byte_mask & BIT5) Rav &= ZAP5; 00121 if(byte_mask & BIT6) Rav &= ZAP6; 00122 if(byte_mask & BIT7) Rav &= ZAP7; 00123 return Rav; 00124 } 00125 00126 /** Rc <- BYTE_ZAP(Rav, byte_mask) **/ 00127 /************************************************/ 00128 int ShiftUnit_value(INST_TYPE ir, DATA_TYPE Rav, 00129 DATA_TYPE Rbv, DATA_TYPE *R){ 00130 int func7 = (ir>>5) & 0x7f; 00131 DATA_TYPE Rcv=0; 00132 unsigned int byte_mask, byte_loc; 00133 00134 switch(func7){ 00135 case 0x34: // SRL 00136 Rcv=(uint_64t)Rav >> (Rbv & 0x3F); break; 00137 case 0x39: // SLL 00138 Rcv=(uint_64t)Rav << (Rbv & 0x3F); break; 00139 case 0x3c: // SRA 00140 Rcv=( int_64t)Rav >> (Rbv & 0x3F); break; 00141 00142 case 0x06: /*__EXTBL; */ 00143 Rcv = (uint_64t)Rav >> ((Rbv & 0x7)<<3); 00144 Rcv &= 0x00000000000000FFllu; 00145 break; 00146 case 0x16: /*__EXTWL; */ 00147 Rcv = (uint_64t)Rav >> ((Rbv & 0x7)<<3); 00148 Rcv &= 0x000000000000FFFFllu; 00149 break; 00150 case 0x26: /*__EXTLL; */ 00151 Rcv = (uint_64t)Rav >> ((Rbv & 0x7)<<3); 00152 Rcv &= 0x00000000FFFFFFFFllu; 00153 break; 00154 00155 case 0x36: /*__EXTQL; */ 00156 Rcv = (uint_64t)Rav >> ((Rbv & 0x7)<<3); 00157 break; 00158 case 0x5a: /*__EXTWH; */ 00159 Rcv = (uint_64t)Rav << (64-((Rbv & 0x7)<<3)); 00160 Rcv &= 0x000000000000FFFFllu; 00161 break; 00162 case 0x6a: /*__EXTLH; */ 00163 Rcv = (uint_64t)Rav << (64-((Rbv & 0x7)<<3)); 00164 Rcv &= 0x00000000FFFFFFFFllu; 00165 break; 00166 case 0x7a: /*__EXTQH; */ 00167 Rcv = (uint_64t)Rav << (64-((Rbv & 0x7)<<3)); 00168 break; 00169 00170 case 0x0b: /*__INSBL; */ 00171 byte_mask = 0x00000001ull << (Rbv & 0x7); 00172 byte_loc = ((Rbv & 0x7) << 3); 00173 Rcv = byte_zap((Rav << byte_loc), ~byte_mask); 00174 break; 00175 case 0x1b: /*__INSWL; */ 00176 byte_mask = 0x00000003ull << (Rbv & 0x7); 00177 byte_loc = ((Rbv & 0x7) << 3); 00178 Rcv = byte_zap((Rav << byte_loc), ~byte_mask); 00179 break; 00180 case 0x2b: /*__INSLL; */ 00181 byte_mask = 0x0000000Full << (Rbv & 0x7); 00182 byte_loc = ((Rbv & 0x7) << 3); 00183 Rcv = byte_zap((Rav << byte_loc), ~byte_mask); 00184 break; 00185 case 0x3b: /*__INSQL; */ 00186 byte_mask = 0x000000FFull << (Rbv & 0x7); 00187 byte_loc = ((Rbv & 0x7) << 3); 00188 Rcv = byte_zap((Rav << byte_loc), ~byte_mask); 00189 break; 00190 00191 case 0x57: /*__INSWH; */ 00192 byte_mask = ((0x3ull << (Rbv & 0x7))>>8); 00193 byte_loc = (64 - ((Rbv & 0x7)<<3)) & 0x3f; 00194 Rcv = byte_zap((Rav >> byte_loc), ~byte_mask); 00195 break; 00196 case 0x67: /*__INSLH; */ 00197 byte_mask = ((0xFull << (Rbv & 0x7))>>8); 00198 byte_loc = (64 - ((Rbv & 0x7)<<3)) & 0x3f; 00199 Rcv = byte_zap((Rav >> byte_loc), ~byte_mask); 00200 break; 00201 case 0x77: /*__INSQH; */ 00202 byte_mask = ((0xFFull << (Rbv & 0x7))>>8); 00203 byte_loc = (64 - ((Rbv & 0x7)<<3)) & 0x3f; 00204 Rcv = byte_zap((Rav >> byte_loc), ~byte_mask); 00205 break; 00206 00207 case 0x02: /*__MSKBL; */ 00208 byte_mask = 0x00000001ull << (Rbv & 0x7); 00209 Rcv = byte_zap(Rav, byte_mask); 00210 break; 00211 case 0x12: /*__MSKWL; */ 00212 byte_mask = 0x00000003ull << (Rbv & 0x7); 00213 Rcv = byte_zap(Rav, byte_mask); 00214 break; 00215 case 0x22: /*__MSKLL; */ 00216 byte_mask = 0x0000000Full << (Rbv & 0x7); 00217 Rcv = byte_zap(Rav, byte_mask); 00218 break; 00219 case 0x32: /*__MSKQL; */ 00220 byte_mask = 0x000000FFull << (Rbv & 0x7); 00221 Rcv = byte_zap(Rav, byte_mask); 00222 break; 00223 case 0x52: /*__MSKWH; */ 00224 byte_mask = (0x3ull << (Rbv & 0x7)) >> 8; 00225 Rcv = byte_zap(Rav, byte_mask); 00226 break; 00227 case 0x62: /*__MSKLH; */ 00228 byte_mask = (0xFull << (Rbv & 0x7)) >> 8; 00229 Rcv = byte_zap(Rav, byte_mask); 00230 break; 00231 case 0x72: /*__MSKQH; */ 00232 byte_mask = (0xFFull << (Rbv & 0x7)) >> 8; 00233 Rcv = byte_zap(Rav, byte_mask); 00234 break; 00235 00236 case 0x30: /*__ZAP; */ 00237 Rcv = byte_zap(Rav, Rbv); 00238 break; 00239 case 0x31: /*__ZAPNOT; */ 00240 Rcv = byte_zap(Rav, ~Rbv); 00241 break; 00242 00243 default: 00244 printf("Warning Code 0x12. f=0x%u\n", func7); 00245 Rcv = 0; 00246 } 00247 00248 *R = Rcv; 00249 return 0; 00250 } 00251 00252 /** Integer Arithmetic and Logic Unit **/ 00253 /************************************************/ 00254 int ALU_value(INST_TYPE ir, DATA_TYPE Rav, 00255 int Racv, DATA_TYPE Rbv, 00256 DATA_TYPE *w, int *cmov){ 00257 DATA_TYPE Rcv=0; 00258 int cm = 0; 00259 00260 int Op = (ir>>26) & 0x3F; 00261 int func7 = (ir>>5) & 0x7F; 00262 00263 switch(Op){ 00264 case 0x0a: Rcv = Rav + Rbv; break; /** LD **/ 00265 case 0x0b: Rcv = (Rav + Rbv) & ~7; break; 00266 case 0x0c: Rcv = Rav + Rbv; break; 00267 case 0x20: Rcv = Rav + Rbv; break; 00268 case 0x21: Rcv = Rav + Rbv; break; 00269 case 0x22: Rcv = Rav + Rbv; break; 00270 case 0x23: Rcv = Rav + Rbv; break; 00271 case 0x28: Rcv = Rav + Rbv; break; 00272 case 0x29: Rcv = Rav + Rbv; break; 00273 case 0x2a: Rcv = Rav + Rbv; break; 00274 case 0x2b: Rcv = Rav + Rbv; break; 00275 00276 case 0x0d: Rcv = Rav + Rbv; break; /** ST **/ 00277 case 0x0e: Rcv = Rav + Rbv; break; 00278 case 0x0f: Rcv = (Rav + Rbv) & ~7; break; 00279 case 0x24: Rcv = Rav + Rbv; break; 00280 case 0x25: Rcv = Rav + Rbv; break; 00281 case 0x26: Rcv = Rav + Rbv; break; 00282 case 0x27: Rcv = Rav + Rbv; break; 00283 case 0x2c: Rcv = Rav + Rbv; break; 00284 case 0x2d: Rcv = Rav + Rbv; break; 00285 case 0x2e: Rcv = Rav + Rbv; break; 00286 case 0x2f: Rcv = Rav + Rbv; break; 00287 00288 case 0x08: Rcv = Rav + Rbv; break; /* LDA */ 00289 case 0x09: Rcv = Rav + Rbv; break; /* LDAH */ 00290 00291 case OP_INTA: 00292 switch(func7){ 00293 case 0x02: 00294 case 0x0b: 00295 case 0x22: 00296 case 0x2b: Rav = (Rav << 2); break; 00297 case 0x12: 00298 case 0x1b: 00299 case 0x32: 00300 case 0x3b: Rav = (Rav << 3); break; 00301 } 00302 00303 switch(func7){ 00304 case 0x00: Rcv = Rav + Rbv; break; 00305 case 0x20: Rcv = Rav + Rbv; break; 00306 case 0x02: Rcv = Rav + Rbv; break; 00307 case 0x22: Rcv = Rav + Rbv; break; 00308 case 0x12: Rcv = Rav + Rbv; break; 00309 case 0x32: Rcv = Rav + Rbv; break; 00310 00311 case 0x09: Rcv = Rav - Rbv; break; 00312 case 0x29: Rcv = Rav - Rbv; break; 00313 case 0x0b: Rcv = Rav - Rbv; break; 00314 case 0x2b: Rcv = Rav - Rbv; break; 00315 case 0x1b: Rcv = Rav - Rbv; break; 00316 case 0x3b: Rcv = Rav - Rbv; break; 00317 00318 00319 case 0x2d: 00320 Rcv = ((int_64t)Rav==(int_64t)Rbv); break; 00321 case 0x4d: 00322 Rcv = ((int_64t)Rav< (int_64t)Rbv); break; 00323 case 0x6d: 00324 Rcv = ((int_64t)Rav<=(int_64t)Rbv); break; 00325 case 0x3d: 00326 Rcv = (Rav <= Rbv); break; 00327 case 0x1d: 00328 Rcv = (Rav < Rbv); break; 00329 00330 case 0x0f: /*__CMPBGE; */ 00331 Rcv=0; 00332 if((Rav & ~ZAP0)>=(Rbv & ~ZAP0)) Rcv|=BIT0; 00333 if((Rav & ~ZAP1)>=(Rbv & ~ZAP1)) Rcv|=BIT1; 00334 if((Rav & ~ZAP2)>=(Rbv & ~ZAP2)) Rcv|=BIT2; 00335 if((Rav & ~ZAP3)>=(Rbv & ~ZAP3)) Rcv|=BIT3; 00336 if((Rav & ~ZAP4)>=(Rbv & ~ZAP4)) Rcv|=BIT4; 00337 if((Rav & ~ZAP5)>=(Rbv & ~ZAP5)) Rcv|=BIT5; 00338 if((Rav & ~ZAP6)>=(Rbv & ~ZAP6)) Rcv|=BIT6; 00339 if((Rav & ~ZAP7)>=(Rbv & ~ZAP7)) Rcv|=BIT7; 00340 break; 00341 00342 default: 00343 printf("Warning in 0x10 arithmetic\n"); 00344 Rcv=0; 00345 } 00346 00347 switch(func7){ 00348 case 0x00: 00349 case 0x09: 00350 case 0x02: 00351 case 0x12: 00352 case 0x0b: 00353 case 0x1b: 00354 if(Rcv & BIT31) Rcv |= EXTND32; 00355 else Rcv &= MASK32; 00356 break; 00357 } 00358 break; 00359 00360 case OP_INTL: 00361 switch(func7){ 00362 case 0x08: 00363 case 0x28: 00364 case 0x48: Rbv = ~Rbv; break; 00365 } 00366 00367 switch(func7){ 00368 case 0x00: Rcv = Rav & Rbv; break; 00369 case 0x08: Rcv = Rav & Rbv; break; 00370 case 0x20: Rcv = Rav | Rbv; break; 00371 case 0x28: Rcv = Rav | Rbv; break; 00372 case 0x40: Rcv = Rav ^ Rbv; break; 00373 case 0x48: Rcv = Rav ^ Rbv; break; 00374 00375 case 0x14: Rcv=Rbv; cm=( Rav & 1); 00376 break; 00377 case 0x16: Rcv=Rbv; cm=(!(Rav & 1)); 00378 break; 00379 case 0x24: Rcv=Rbv; cm=(Rav==0); 00380 break; 00381 case 0x26: Rcv=Rbv; cm=(Rav!=0); 00382 break; 00383 case 0x44: Rcv=Rbv; cm=((int_64t)Rav< 0); 00384 break; 00385 case 0x46: Rcv=Rbv; cm=((int_64t)Rav>=0); 00386 break; 00387 case 0x64: Rcv=Rbv; cm=((int_64t)Rav<=0); 00388 break; 00389 case 0x66: Rcv=Rbv; cm=((int_64t)Rav> 0); 00390 break; 00391 00392 case 0x61: /* AMASK */ 00393 Rcv=Rbv & ~CPU_FEATURE_MASK; break; 00394 case 0x6c: /* IMPLVER */ 00395 Rcv=IMPLEMENTATION_VERSION; break; 00396 00397 /** CMOVb: assigned by Kenji KISE **/ 00398 case 0x6e: Rcv = (Racv) ? Rbv : Rav; break; 00399 00400 default: 00401 printf("Warning 0x11 Func:0x%x \n",func7); 00402 printf("Default Case.\n"); 00403 Rcv=0; break; 00404 } 00405 break; 00406 } 00407 00408 *w = Rcv; 00409 *cmov = cm; 00410 return 0; 00411 } 00412 00413 /** Floating Arithmetic and Logic Unit **/ 00414 /************************************************/ 00415 int FALU_value(INST_TYPE ir, DATA_TYPE Rav, 00416 int Racv, DATA_TYPE Rbv, 00417 DATA_TYPE *w, int *cmov){ 00418 DATA_TYPE Rcv=0; 00419 00420 int code = (ir>>26) & 0x3F; 00421 int func11 = (ir>>5) & 0x7FF; 00422 00423 double Fav = 0.0, Fbv = 0.0, Fcv = 0.0; 00424 00425 // Ignore Floagint Exceptions 00426 // signal(SIGFPE, SIG_IGN); 00427 00428 memcpy(&Fav, &Rav, 8); 00429 memcpy(&Fbv, &Rbv, 8); 00430 00431 switch(code){ 00432 00433 /** Integer to floating-point reg move **/ 00434 case OP_ITFP: 00435 switch(func11){ 00436 case 0x024: // ITOFT 00437 // if(Rav==0) Rav=0xaae4d; /* ????? */ 00438 memcpy(&Fcv, &Rav, 8); 00439 break; 00440 00441 case 0x004: // ITOFS 00442 { 00443 DATA_TYPE tmp = 0; 00444 tmp = ((Rav & BIT31) << 32) | 00445 (map_s(Rav) << 52) | 00446 ((Rav & 0x7fffff) << 29); 00447 memcpy(&Fcv, &tmp, 8); 00448 } 00449 break; 00450 00451 case 0x0ab: // SQRTT 00452 { 00453 Fcv = sqrt(Fbv); 00454 } 00455 break; 00456 00457 default: 00458 printf("Warning 0x14 Floating Default "); 00459 printf("func11 %x \n", func11); 00460 exit(1); 00461 Fcv=0.0; 00462 } 00463 memcpy(&Rcv, &Fcv, 8); 00464 break; 00465 00466 /** Floating-point to integer reg move **/ 00467 case OP_FPTI: 00468 switch(func11){ 00469 // SEXTB(Sign Extend Byte): 00470 // Rc <= SEXT(Rbv[7:0]) 00471 case 0x000: 00472 Rcv = (Rbv & BIT7) ? 00473 Rbv |= EXTND8 : (Rbv & 0xffull); 00474 break; 00475 case 0x001: // SEXTW(Sign Extend Word) 00476 Rcv = (Rbv & BIT15) ? 00477 Rbv |= EXTND16 : (Rbv & 0xffffull); 00478 break; 00479 case 0x070: // FTOIT: Rc <= Fav 00480 Rcv = Rav; 00481 break; 00482 case 0x078: // FTOIS: Rc <= Fav 00483 Rcv = ((Rav>>32) & 0xc0000000) 00484 | ((Rav >> 29) & 0x3fffffff); 00485 if(Rav & BIT63) Rcv |= EXTND32; 00486 break; 00487 00488 default: 00489 printf("Warning 0x1c Floating Default. "); 00490 printf("func11 %x \n", func11); 00491 exit(1); 00492 } 00493 break; 00494 /*** VAX floating-point instruction ***/ 00495 case OP_FLTV: 00496 printf("Warning 0x15 Floating Default. "); 00497 printf("func11 %x \n", func11); 00498 exit(1); 00499 00500 /*** IEEE floating-point instruction ***/ 00501 case OP_FLTI: { 00502 switch(func11){ 00503 00504 case 0x080: 00505 case 0x000: 00506 case 0x040: 00507 case 0x0c0: 00508 case 0x180: 00509 case 0x100: 00510 case 0x140: 00511 case 0x1c0: 00512 case 0x580: 00513 case 0x500: 00514 case 0x540: 00515 case 0x5c0: 00516 case 0x780: 00517 case 0x700: 00518 case 0x740: 00519 case 0x7c0: 00520 Fcv = Fav + Fbv; break; break; // ADDS 00521 00522 case 0x0a0: 00523 case 0x020: 00524 case 0x060: 00525 case 0x0e0: 00526 case 0x1a0: 00527 case 0x120: 00528 case 0x160: 00529 case 0x1e0: 00530 case 0x5a0: 00531 case 0x520: 00532 case 0x560: 00533 case 0x5e0: 00534 case 0x7a0: 00535 case 0x720: 00536 case 0x760: 00537 case 0x7e0: Fcv = Fav + Fbv; break; // ADDT 00538 00539 case 0x0a5: 00540 case 0x5a5: // CMPTEQ 00541 Fcv = (Fav==Fbv) ? 2.0 : 0.0; break; 00542 00543 case 0x0a6: 00544 case 0x5a6: // CMPTLT 00545 Fcv = (Fav< Fbv) ? 2.0 : 0.0; break; 00546 00547 case 0x0a7: 00548 case 0x5a7: // CMPTLE 00549 Fcv = (Fav<=Fbv) ? 2.0 : 0.0; break; 00550 00551 case 0x0a4: 00552 case 0x5a4: // CMPTUN 00553 Fcv = (isnan(Fav) || isnan(Fbv)) ? 00554 2.0 : 0.0; break; 00555 00556 case 0x0bc: 00557 case 0x03c: 00558 case 0x07c: 00559 case 0x0fc: 00560 case 0x7bc: 00561 case 0x73c: 00562 case 0x77c: 00563 case 0x7fc: // CVTQS 00564 Fcv = (double)(int_64t)Rbv; 00565 break; 00566 00567 case 0x0be: 00568 case 0x03e: 00569 case 0x07e: 00570 case 0x0fe: 00571 case 0x7be: 00572 case 0x73e: 00573 case 0x77e: 00574 case 0x7fe: // CVTQT 00575 Fcv = (double)(int_64t)Rbv; 00576 break; 00577 00578 case 0x0ac: 00579 case 0x02c: 00580 case 0x06c: 00581 case 0x0ec: 00582 case 0x1ac: 00583 case 0x12c: 00584 case 0x16c: 00585 case 0x1ec: 00586 case 0x5ac: 00587 case 0x52c: 00588 case 0x56c: 00589 case 0x5ec: 00590 case 0x7ac: 00591 case 0x72c: 00592 case 0x76c: 00593 case 0x7ec: // CVTTS 00594 { 00595 memcpy(&Fcv, &Rbv, 8); 00596 float tmp = Fcv; 00597 Fcv = tmp; 00598 } 00599 break; 00600 00601 case 0x083: 00602 case 0x003: 00603 case 0x043: 00604 case 0x0c3: 00605 case 0x183: 00606 case 0x103: 00607 case 0x143: 00608 case 0x1c3: 00609 case 0x583: 00610 case 0x503: 00611 case 0x543: 00612 case 0x5c3: 00613 case 0x783: 00614 case 0x703: 00615 case 0x743: 00616 case 0x7c3: // DIVS 00617 if(Fbv==0.0){ 00618 Fcv = 0.0; 00619 break; 00620 } 00621 Fcv = Fav / Fbv; 00622 break; 00623 00624 case 0x0a3: 00625 case 0x023: 00626 case 0x063: 00627 case 0x0e3: 00628 case 0x1a3: 00629 case 0x123: 00630 case 0x163: 00631 case 0x1e3: 00632 case 0x5a3: 00633 case 0x523: 00634 case 0x563: 00635 case 0x5e3: 00636 case 0x7a3: 00637 case 0x723: 00638 case 0x763: 00639 case 0x7e3: // DIVT 00640 if(Fbv==0.0){ 00641 Fcv = 0.0; 00642 break; 00643 } 00644 Fcv = (double)(Fav / Fbv); 00645 break; 00646 00647 case 0x082: 00648 case 0x002: 00649 case 0x042: 00650 case 0x0c2: 00651 case 0x182: 00652 case 0x102: 00653 case 0x142: 00654 case 0x1c2: 00655 case 0x582: 00656 case 0x502: 00657 case 0x542: 00658 case 0x5c2: 00659 case 0x782: 00660 case 0x702: 00661 case 0x742: 00662 case 0x7c2: // MULS 00663 Fcv = Fav * Fbv; break; 00664 00665 case 0x0a2: 00666 case 0x022: 00667 case 0x062: 00668 case 0x0e2: 00669 case 0x1a2: 00670 case 0x122: 00671 case 0x162: 00672 case 0x1e2: 00673 case 0x5a2: 00674 case 0x522: 00675 case 0x562: 00676 case 0x5e2: 00677 case 0x7a2: 00678 case 0x722: 00679 case 0x762: 00680 case 0x7e2: // MULT 00681 Fcv = Fav * Fbv; break; 00682 00683 case 0x081: 00684 case 0x001: 00685 case 0x041: 00686 case 0x0c1: 00687 case 0x181: 00688 case 0x101: 00689 case 0x141: 00690 case 0x1c1: 00691 case 0x581: 00692 case 0x501: 00693 case 0x541: 00694 case 0x5c1: 00695 case 0x781: 00696 case 0x701: 00697 case 0x741: 00698 case 0x7c1: // SUBS 00699 Fcv = Fav - Fbv; break; 00700 00701 case 0x0a1: 00702 case 0x021: 00703 case 0x061: 00704 case 0x0e1: 00705 case 0x1a1: 00706 case 0x121: 00707 case 0x161: 00708 case 0x1e1: 00709 case 0x5a1: 00710 case 0x521: 00711 case 0x561: 00712 case 0x5e1: 00713 case 0x7a1: 00714 case 0x721: 00715 case 0x761: 00716 case 0x7e1: // SUBT 00717 Fcv = Fav - Fbv; break; 00718 00719 case 0x0af: 00720 case 0x02f: 00721 case 0x1af: 00722 case 0x12f: 00723 case 0x5af: 00724 case 0x52f: 00725 case 0x7af: 00726 case 0x72f: 00727 case 0x0ef: 00728 case 0x1ef: 00729 case 0x5ef: 00730 case 0x7ef: 00731 case 0x06f: 00732 case 0x16f: 00733 case 0x56f: 00734 case 0x76f: // CVTTQ 00735 { 00736 int_64t tmp; 00737 tmp = (int_64t)Fbv; 00738 memcpy(&Fcv, &tmp, 8); 00739 } 00740 break; 00741 00742 default: 00743 printf("Warning 0x16 Floating. "); 00744 printf("f=%x \n", func11); 00745 exit(1); 00746 Fcv=0.0; 00747 } 00748 memcpy(&Rcv, &Fcv, 8); 00749 00750 break; 00751 } 00752 00753 /*** Floating-point instruction ***/ 00754 case OP_FLTL: 00755 { 00756 switch(func11){ 00757 case 0x020: /*__CPYS; Copy Sign */ 00758 { 00759 uint_64t tmp=0; 00760 tmp |= (Rav & BIT63); 00761 tmp |= (Rbv & ~BIT63); 00762 memcpy(&Fcv, &tmp, 8); 00763 } 00764 /* 00765 tmp = Rav; 00766 tmp2 = Rbv; 00767 tmp2 = ((tmp2 << 1) >> 1); 00768 if(tmp & BIT63) tmp2 |= BIT63; 00769 memcpy(&Fcv, &tmp2, 8); 00770 */ 00771 break; 00772 00773 case 0x021: /*__CPYSN; Copy Sign Negative */ 00774 { 00775 uint_64t tmp=0; 00776 tmp |= (~Rav & BIT63); 00777 tmp |= ( Rbv & ~BIT63); 00778 memcpy(&Fcv, &tmp, 8); 00779 } 00780 break; 00781 00782 /*__CPYSE; Copy Sign and Exponent */ 00783 case 0x022: { 00784 uint_64t tmp=0; 00785 tmp |= (Rav & 0xFFF0000000000000llu); 00786 tmp |= (Rbv & ~0xFFF0000000000000llu); 00787 memcpy(&Fcv, &tmp, 8); 00788 } 00789 /* 00790 tmp = Rav; 00791 tmp2 = Rbv; 00792 tmp &= 0xFFF0000000000000llu; 00793 tmp2 &= 0x000FFFFFFFFFFFFFllu; 00794 tmp |= tmp2; 00795 memcpy(&Fcv, &tmp, 8); 00796 */ 00797 break; 00798 00799 case 0x010: /*__CVTLQ; */ 00800 { 00801 uint_64t tmp = 0; 00802 tmp = 0; 00803 tmp |= ((Rbv>>32) & 0xc0000000ull); 00804 tmp |= ((Rbv>>29) & 0x3fffffffull); 00805 if(tmp & BIT31) tmp |= EXTND32; 00806 memcpy(&Fcv, &tmp, 8); 00807 } 00808 break; 00809 00810 case 0x030: { /*__CVTQL; */ 00811 DATA_TYPE tmp = 0; 00812 // SimpleScalar has a bug? 00813 tmp |= (((Rbv << 32) & 00814 0xc000000000000000ull)); 00815 tmp |= (((Rbv << 29) & 00816 0x07ffffffe0000000ull)); 00817 memcpy(&Fcv, &tmp, 8); 00818 break; 00819 } 00820 00821 case 0x24: /* __MT_FPCR */ 00822 /* Move Fav to Floating-point 00823 Control Register 00824 Return 0.0 for the simplicity. 00825 */ 00826 Fcv=0.0; break; 00827 00828 case 0x25: /* __MF_FPCR */ 00829 /* Move from Floating-point 00830 Control Register to Fa 00831 Return 0.0 for the simplicity. 00832 */ 00833 Fcv=0.0; break; 00834 00835 case 0x02a:/*__FCMOVEQ; */ 00836 Fcv = Fbv; *cmov = (Fav==0.0); 00837 break; 00838 00839 case 0x02b:/*__FCMOVNE; */ 00840 Fcv = Fbv; *cmov=(Fav!=0.0); 00841 break; 00842 00843 /** CMOVb: assigned by Kenji KISE. **/ 00844 case 0x333: 00845 Fcv = (Racv) ? Fbv : Fav; 00846 break; 00847 00848 default: 00849 printf("Floating 0x17 code default"); 00850 printf("func11 0x%x\n", func11); 00851 exit(1); 00852 Fcv=0.0; break; 00853 } 00854 memcpy(&Rcv, &Fcv, 8); 00855 break; 00856 } 00857 } 00858 00859 *w = Rcv; 00860 return 0; 00861 } 00862 00863 /** calculate Rcv **/ 00864 /************************************************/ 00865 int ALU(INST_TYPE ir, data_t *R1, data_t *R2, 00866 data_t *Rw){ 00867 DATA_TYPE Rcv=0; 00868 DATA_TYPE Rav=R1->ld(); 00869 DATA_TYPE Rbv=R2->ld(); 00870 int Racm = R1->cmov; 00871 int cm=0; 00872 00873 int Op = (ir>>26) & 0x3F; 00874 switch(Op){ 00875 case OP_JSR: 00876 00877 case 0x30: /** BR **/ 00878 case 0x31: 00879 case 0x32: 00880 case 0x33: 00881 case 0x34: 00882 case 0x35: 00883 case 0x36: 00884 case 0x37: 00885 case 0x38: 00886 case 0x39: 00887 case 0x3a: 00888 case 0x3b: 00889 case 0x3c: 00890 case 0x3d: 00891 case 0x3e: 00892 case 0x3f: Rcv = Rbv; break; 00893 00894 case OP_PAL : Rcv=0; break; 00895 case OP_MISC: Rcv=0; break; 00896 case OP_INTS: 00897 ShiftUnit_value(ir, Rav, Rbv, &Rcv); 00898 break; 00899 00900 case OP_INTM: 00901 MUL_value(ir, Rav, Rbv, &Rcv); 00902 break; 00903 00904 case OP_LDA : 00905 case OP_LDAH: 00906 case OP_INTA: 00907 case OP_INTL: 00908 ALU_value(ir, Rav, Racm, Rbv, &Rcv, &cm); 00909 break; 00910 00911 case OP_ITFP: 00912 case OP_FLTV: 00913 case OP_FLTI: 00914 case OP_FLTL: 00915 case OP_FPTI: 00916 FALU_value(ir, Rav, Racm, Rbv, &Rcv, &cm); 00917 break; 00918 00919 default: 00920 ALU_value(ir, Rav, Racm, Rbv, &Rcv, &cm); 00921 break; 00922 } 00923 00924 Rw->cmov = cm; 00925 Rw->st(Rcv); 00926 00927 return 0; 00928 } 00929 /************************************************/ ------------------------------------------------------------ file name: debug.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 00006 00007 /* convert hexadecimal value into decimal value */ 00008 /************************************************/ 00009 uint_64t get_hex(char *buf){ 00010 static char hex_chars[] = { 00011 '0', '1', '2', '3', '4', '5', '6', '7', 00012 '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'}; 00013 00014 uint_64t sum = 0; 00015 00016 for(int i=0; i<16; i++){ 00017 char t = buf[i]; 00018 if(t==' ' || t=='\n' || t==0) break; 00019 int num=0; 00020 for(int j=0; j<16; j++){ 00021 if(hex_chars[j]==t) num=j; 00022 } 00023 sum = sum * 16 + num; 00024 } 00025 return sum; 00026 } 00027 00028 /************************************************/ 00029 void print_register_name(int i){ 00030 static char *alpha_reg_name[] = { 00031 "v0", "t0", "t1", "t2", 00032 "t3", "t4", "t5", "t6", 00033 "t7", "s0", "s1", "s2", 00034 "s3", "s4", "s5", "fp", 00035 "a0", "a1", "a2", "a3", 00036 "a4", "a5", "t8", "t9", 00037 "t10", "t11", "ra", "t12", 00038 "at", "gp", "sp", "zero", 00039 "pc", "vfp " 00040 }; 00041 printf("%-5s", alpha_reg_name[i]); 00042 return; 00043 } 00044 00045 /************************************************/ 00046 void print_status(ADDR_TYPE pc, char *buf, 00047 data_t *reg, uint_64t tc){ 00048 for(int i=0; i<32; i++){ 00049 print_register_name(i); 00050 printf(" r%-2d 0x%-6llx %-8lld\n", 00051 i, reg[i].ld(), reg[i].ld()); 00052 } 00053 printf("fpcr 0x0 0\n"); 00054 printf("pc 0x%-6llx %-8lld\n", 00055 pc, pc); 00056 printf("vfp 0x0 0\n"); 00057 } 00058 00059 00060 /************************************************/ 00061 debug::debug(Env *e){ 00062 ev = e; 00063 } 00064 00065 /************************************************/ 00066 void debug::debugmode(){ 00067 char t_buf[256]; 00068 char t_temp[256]; 00069 static int stop = 1; 00070 00071 char *buf; 00072 char *temp; 00073 00074 static uint_64t stop_count = 0; 00075 static ADDR_TYPE stop_address = 0; 00076 ADDR_TYPE address; 00077 00078 buf = t_buf; 00079 temp = t_temp; 00080 00081 if(stop_count==ev->e->retired_inst){ stop=1; } 00082 if(stop_address==ev->as->pc.ld()){ stop=1; } 00083 if(stop==0) return; 00084 00085 if(stop==1){ 00086 data_t d; 00087 INST_TYPE ir; 00088 ev->mem->ld_nbyte(4, &ev->as->pc, &d); 00089 ir = d.ld() & 0xffffffff; 00090 00091 data_t ir_t; 00092 ev->mem->ld_nbyte(4, &ev->as->pc, &ir_t); 00093 printf("TC:%lld pc:%llx ir:%08llx\n", 00094 ev->e->retired_inst, 00095 ev->as->pc.ld(), ir_t.ld()); 00096 00097 print_status(ev->as->pc.ld(), NULL, 00098 ev->as->r, ev->e->retired_inst); 00099 00100 printf("(db)"); 00101 fgets(buf,256, stdin); 00102 00103 while(*buf != (char)NULL){ 00104 if(!strncmp(buf,"quit",4)) exit(1); 00105 if(!strncmp(buf,"h",1)){ /* help */ 00106 printf(" command\n"); 00107 printf(" c: stop specified tc.\n"); 00108 printf(" s: stop specified address.\n"); 00109 printf(" x: examine memory contents.\n"); 00110 printf(" quit: quit simulate.\n"); 00111 } 00112 if(*(buf)=='\n') break; 00113 00114 if(*(buf)=='x'){ 00115 buf++; 00116 address = get_hex(buf); 00117 address = (address & ~7llu); 00118 00119 for(int j=0; j<16; j++){ 00120 data_t tmp; 00121 printf("0x%09llx: ", address); 00122 for(int i=0; i<2; i++){ 00123 data_t adr; 00124 adr.st(address); 00125 ev->mem->ld_nbyte(8, &adr, &tmp); 00126 printf("0x%016llx ", tmp.ld()); 00127 address +=8; 00128 } 00129 printf("\n"); 00130 } 00131 } 00132 00133 if(*(buf)=='c'){ /* stop by count */ 00134 buf++; 00135 stop_count = atol(buf); 00136 printf("stop_tc = %lld\n", stop_count); 00137 stop=0; 00138 break; 00139 } 00140 00141 if(*(buf)=='s'){ /* stop by address */ 00142 buf++; 00143 stop_address = get_hex(buf); 00144 stop_address = stop_address; 00145 printf("stop_address = 0x%llx\n", 00146 stop_address); 00147 stop=0; 00148 break; 00149 } 00150 00151 printf("\n(db)"); 00152 fgets(buf,256,stdin); 00153 } 00154 } 00155 } 00156 /************************************************/ ------------------------------------------------------------ file name: etc.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 #include 00006 00007 /************************************************/ 00008 void usage(){ 00009 char UsageMessage[] = "\ 00010 Usage: SimAlpha [-option] command\n\ 00011 -d: debug mode\n\ 00012 -a: print simple evaluation result.\ 00013 -c: print systemcall trace\n\ 00014 -v[num]: verbose mode, prints '.'\ 00015 by VERBOSE_INTERVAL\n\ 00016 -f[num]: set fd_adjust to verify simulation\n\ 00017 -e[num][m]: end simulation at num code run. \ 00018 m means million\n\ 00019 -i[file_name]: file_name as STDIN input file\n\ 00020 "; 00021 printf("%s", UsageMessage); exit(0); 00022 } 00023 00024 /************************************************/ 00025 void house_keeper(Env *ev){ 00026 if(ev->sc->debug_flag) ev->deb->debugmode(); 00027 if(ev->sc->verbose_interval && 00028 (ev->e->retired_inst % 00029 ev->sc->verbose_interval)==0){ 00030 write(1, ".", 1); 00031 } 00032 if(ev->sc->end_tc!=0 && 00033 ev->e->retired_inst>=ev->sc->end_tc) 00034 ev->sys->running = 0; 00035 } 00036 00037 /************************************************/ 00038 void option_from_file(char **opt, char *name){ 00039 char *buf; 00040 for(int i=0; iev->as->pc.ld(); 00067 int running = chip->step(); 00068 00069 for(int i=0; i<31; i++) 00070 *(p++)=chip->ev->as->r[i].ld(); 00071 for(int i=0; i<31; i++) 00072 *(p++)=chip->ev->as->f[i].ld(); 00073 00074 if(running==0) delete chip; 00075 break; 00076 } 00077 default: 00078 printf("Warning: %d siple_cpu.\n", job); 00079 } 00080 return 0; 00081 } 00082 00083 /* map_s is used in LDS & ITOFS instruction */ 00084 /* input of 8bit and output of 11bit */ 00085 /************************************************/ 00086 uint_64t map_s(unsigned int int_tmp){ 00087 unsigned int i8 = (int_tmp >> 23) & 0xFF; 00088 00089 /** Next line should be valid, 00090 SimpleScalar has a bug ? **/ 00091 // if(i8==0xFF) return 0x00000000000007FFull; 00092 if(i8==0x00) return 0x0000000000000000ull; 00093 00094 if(i8 & 0x80) return 0x400ull | (i8 & 0x7F); 00095 else return 0x380ull | (i8 & 0x7F); 00096 00097 printf("Warning In load_store.c, map_s().\n"); 00098 } 00099 00100 /* If IR is not the cmov, return 0. */ 00101 /************************************************/ 00102 INST_TYPE cmov_ir_create(INST_TYPE ir){ 00103 int Op = (ir>>26) & 0x3F; 00104 int func7 = (ir>>5) & 0x7f; 00105 int func11 = (ir>>5) & 0x7FF; 00106 00107 switch(Op){ 00108 case 0x11: 00109 switch(func7){ 00110 case 0x14: 00111 case 0x16: 00112 case 0x24: 00113 case 0x26: 00114 case 0x44: 00115 case 0x46: 00116 case 0x64: 00117 case 0x66: { 00118 INST_TYPE ret; 00119 int Op = (ir>>26) & 0x3F; 00120 int Lit = (ir>>13) & 0xFF; 00121 int RC = (ir ) & 0x1F; 00122 int Fnc = 0x6e; 00123 /** This is assigned by Kenji KISE. **/ 00124 ret = (Op << 26) | (RC<<21) | (Lit<<13) | 00125 (ir & BIT12) | (Fnc<<5) | RC; 00126 return ret; 00127 } 00128 } 00129 case 0x17: 00130 switch(func11){ 00131 case 0x02a: 00132 case 0x02b: 00133 case 0x02c: 00134 case 0x02d: 00135 case 0x02e: 00136 case 0x02f: { 00137 INST_TYPE ret; 00138 int Op = (ir>>26) & 0x3F; 00139 int RB = (ir>>16) & 0x1F; 00140 int RC = (ir ) & 0x1F; 00141 int Fnc = 0x333; 00142 /** This is assigned by Kenji KISE. **/ 00143 ret = (Op << 26) | (RC<<21) | (RB<<16) | 00144 (Fnc<<5) | RC; 00145 return ret; 00146 } 00147 } 00148 } 00149 return 0; 00150 } 00151 00152 /************************************************/ 00153 int data_t::init(uint_64t d){ 00154 value = d; 00155 cmov = 0; 00156 return 0; 00157 } 00158 00159 /************************************************/ 00160 uint_64t data_t::ld(){ 00161 return value; 00162 } 00163 00164 /************************************************/ 00165 int data_t::st(uint_64t d){ 00166 value = d; 00167 return 0; 00168 } 00169 00170 /* 00171 * Initialize the registers, data file format. 00172 * Begin by "\@" to indicate the valid data. 00173 * /@reg 28 0000000000000000 00174 * /@reg 29 0000000140023e90 */ 00175 /************************************************/ 00176 architecture_state:: 00177 architecture_state(Env *e){ 00178 ev = e; 00179 00180 for(int i=0; i<32; i++) r[i].init(0); 00181 for(int i=0; i<32; i++) f[i].init(0); 00182 00183 char *program_name = ev->sc->program_name; 00184 FILE *fp = fp = fopen(program_name, "r"); 00185 if(fp==NULL){ 00186 printf("Bad file name: %s\n", 00187 program_name); 00188 exit(1); 00189 } 00190 00191 /*** File Format Check ***/ 00192 DATA_TYPE dat; 00193 char buf[4096]; 00194 fgets(buf, 4096, fp); 00195 if(strncmp(buf+3, "SimAlpha", 8)){ 00196 printf("%s: Not a SimAlpha data file.\n", 00197 program_name); 00198 exit(1); 00199 } 00200 00201 while(!feof(fp)){ 00202 int i; 00203 fgets(buf, 4096, fp); 00204 if(*buf=='/' && *(buf+1)=='@'){ 00205 sscanf(buf+6,"%d", &i); 00206 dat = get_hex(buf+9); 00207 if(i==32) pc.init(dat); 00208 else r[i].init(dat); 00209 } 00210 if(i==32) break; 00211 } 00212 fclose(fp); 00213 } 00214 00215 uint_64t architecture_state::rr(int n){ 00216 if(n==0) return pc.ld(); 00217 if(n>=1 && n<=32) return r[n-1].ld(); 00218 if(n>=33 && n<=64) return f[n-33].ld(); 00219 printf("Error:architecture_state::rr(%d)\n",n); 00220 exit(1); 00221 return 0; 00222 } 00223 00224 /************************************************/ 00225 void print_evaluation_result(Env *ev){ 00226 struct evaluation_result *e = ev->e; 00227 struct timeval tp; 00228 struct timezone tzp; 00229 00230 if(ev->sc->simple_result){ 00231 printf("\n"); 00232 for(int i=0; i<60; i++) printf("="); 00233 printf("\n=== %s %s\n", NAME, VER); 00234 printf("=== %6lld million code(%14lld code)\n", 00235 e->retired_inst/1000000,e->retired_inst); 00236 return; 00237 } 00238 00239 gettimeofday(&tp, &tzp); 00240 uint_64t usec = 00241 (uint_64t)(tp.tv_sec - e->tp.tv_sec) 00242 * 1000000ull + (uint_64t)tp.tv_usec - 00243 (uint_64t)e->tp.tv_usec; 00244 fflush(stdout); 00245 fflush(stderr); 00246 int minute = (usec / 1000000) / 60; 00247 int second = (usec / 1000000) % 60; 00248 printf("\n"); 00249 for(int i=0; i<60; i++) printf("="); 00250 printf("\n=== %s %s\n", NAME, VER); 00251 char buf[256]; 00252 getcwd(buf, 256); 00253 printf("=== cwd: %s\n", buf); 00254 printf("=== %6lld million code(%14lld code)", 00255 e->retired_inst/1000000,e->retired_inst); 00256 printf(" %6.3f MIPS\n", 00257 (double)e->retired_inst/(double)usec); 00258 printf("=== SimAlpha takes %5d min %2d second", 00259 minute, second); 00260 printf(" (%12lld usec)\n", usec); 00261 printf("=== SimAlpha starts at %s", 00262 ctime(&e->time_begin)); 00263 printf("=== Memory %5dKB used", 00264 BLOCK_SIZE/1024 * e->used_memory_block); 00265 printf("(block size %2dKB, %4d blocks)\n", 00266 BLOCK_SIZE/1024, e->used_memory_block); 00267 fflush(stdout); 00268 } 00269 00270 /************************************************/ 00271 system_config::system_config(char *program, 00272 char **option){ 00273 memset(this, 0, sizeof(system_config)); 00274 strcpy(program_name, program); 00275 00276 if(option==NULL) return; 00277 for(int i=0; option[i]!=NULL; i++){ 00278 char opt[1024]; 00279 strcpy(opt, option[i]); 00280 if(opt[0]!='-') continue; 00281 switch(opt[1]){ 00282 case 'a': simple_result = 1; break; 00283 case 'c': syscall_flag = 1; break; 00284 case 'd': debug_flag = 1; break; 00285 case 'v': 00286 verbose_interval =atoi(&opt[2]); 00287 if(verbose_interval == 0) 00288 verbose_interval = 100000; 00289 if(opt[strlen(opt)-1]=='m') 00290 verbose_interval*=1000000; 00291 printf("*** verbose interval: %d\n", 00292 verbose_interval); 00293 break; 00294 case 'f': 00295 fd_adjust = atoi(&opt[2]); 00296 if(fd_adjust==0) fd_adjust=1; 00297 printf("*** fd_adjust=%d \n",fd_adjust); 00298 if(fd_adjust<0){ 00299 printf("Error fd_adjust.\n"); 00300 exit(1); 00301 } 00302 break; 00303 case 'e': 00304 end_tc =atoi(&opt[2]); 00305 if(opt[strlen(opt)-1]=='m')end_tc*=1000000; 00306 printf("** Finish at %lld code execution\n", 00307 end_tc); 00308 break; 00309 case 'i': 00310 fd_stdin_flag = 1; 00311 fd_stdin = open(&opt[2], O_RDONLY); 00312 printf("*** SimAlpha: use [%s] as STDIN.\n", 00313 &opt[2]); 00314 if(fd_stdin<0){ 00315 printf("Can not open file:%s\n",&opt[2]); 00316 exit(1); 00317 } 00318 break; 00319 default: 00320 printf("*** Error:[%s] Wrong option!!\n\n", 00321 opt); 00322 usage(); 00323 exit(1); 00324 } 00325 } 00326 } 00327 00328 /************************************************/ 00329 evaluation_result::evaluation_result(){ 00330 memset(this,0,sizeof(class evaluation_result)); 00331 00332 time_begin = time(0); 00333 gettimeofday(&tp, &tzp); 00334 } 00335 /************************************************/ ------------------------------------------------------------ file name: syscall.cc 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include "define.h" 00005 #include 00006 00007 /************************************************/ 00008 int system_manager::translate_fd(DATA_TYPE fd){ 00009 for(int i=0; isc->fd_adjust; 00030 } 00031 00032 /************************************************/ 00033 void system_manager::execute_pal(instruction *p){ 00034 INST_TYPE ir = p->get_ir(); 00035 int_64t ret=0; 00036 int F = ev->sc->syscall_flag; 00037 data_t *r = ev->as->r; 00038 00039 if(F) printf("%8lld: ", ev->e->retired_inst); 00040 00041 if((ir & 0xFFFF)!=0x0083){ 00042 switch((ir & 0xFFFF)){ 00043 case 0x009e: // rdunique(Read Unique Value) 00044 r[0].init(uniq); 00045 if(F){ 00046 printf("call_pal rduniq=%llx\n", uniq); 00047 } 00048 return; 00049 case 0x009f: // wrunique(Write Unique Value) 00050 uniq = r[16].ld(); 00051 if(F){ 00052 printf("call_pal wrruniq=%llx\n", 00053 r[16].ld()); 00054 } 00055 return; 00056 default: 00057 if(F){ 00058 printf("*** PAL(ir & 0xFFFF)!=0x83 F=%x", 00059 (ir & 0xffff)); 00060 printf(" TC:%lld default. %llx\n", 00061 ev->e->retired_inst, r[0].ld()); 00062 } 00063 return; 00064 } 00065 } 00066 00067 if(r[0].ld()==0){ 00068 r[19].init(0); 00069 return; 00070 } 00071 00072 switch(r[0].ld()){ 00073 /********************************************/ 00074 case ASYS_UNIMPLEMENT: { 00075 ret = -1; 00076 r[0].init(0); 00077 r[19].init(ret); 00078 if(F){ 00079 printf("SYS_226 = %lld\n", ret); 00080 } 00081 break; 00082 } 00083 /********************************************/ 00084 case ASYS_unlink: { 00085 char buf[512]; /** file name **/ 00086 for(int i=0; i<=512; i++){ 00087 data_t d; 00088 data_t adr; 00089 adr.init(r[16].ld()+i); 00090 ev->mem->ld_nbyte(1, &adr, &d); 00091 buf[i] = d.ld(); 00092 if(buf[i]=='\0') break; 00093 } 00094 if(ev->sc->fd_adjust){ /** rename **/ 00095 buf[1]='S'; 00096 buf[2]='A'; 00097 buf[3]='0'+ ev->sc->fd_adjust; 00098 } 00099 00100 ret = unlink(buf); 00101 if(ret==-1){ 00102 r[0].init(errno); 00103 r[19].init(ret); 00104 } 00105 else{ 00106 r[19].init(0); 00107 } 00108 00109 if(F){ 00110 printf("unlink(%s) = %lld\n", buf, ret); 00111 } 00112 break; 00113 } 00114 /********************************************/ 00115 case ASYS_open: { 00116 int fd_t; 00117 char buf[512]; /** file name **/ 00118 for(int i=0; i<=512; i++){ 00119 data_t d; 00120 data_t adr; 00121 adr.init(r[16].ld()+i); 00122 ev->mem->ld_nbyte(1, &adr, &d); 00123 buf[i] = d.ld(); 00124 if(buf[i]=='\0') break; 00125 } 00126 /** RDONLY or RDWR **/ 00127 if(r[17].ld()==0 || r[17].ld()==2){ 00128 fd_t = open(buf, r[17].ld(), r[18].ld()); 00129 } 00130 else{ 00131 if(ev->sc->fd_adjust){ /** rename **/ 00132 buf[1]='S'; 00133 buf[2]='A'; 00134 buf[3]='0'+ ev->sc->fd_adjust; 00135 } 00136 int flag = r[17].ld() | O_CREAT; 00137 fd_t = open(buf, flag, r[18].ld()); 00138 } 00139 00140 /* mapping from the real to the logical */ 00141 if(fd_t==-1){ 00142 ret = -1; 00143 r[0].init(errno); 00144 r[19].init(~0ull); 00145 } 00146 else{ 00147 ret = fd_table[fd_t]; 00148 r[0].init(ret); 00149 r[19].init(0); 00150 } 00151 00152 if(F){ 00153 printf("open(\"%s\", 0x%llx, 0x%llx)", 00154 buf, r[17].ld(), r[18].ld()); 00155 printf("= logic %lld(real %d)\n", 00156 ret, fd_t); 00157 } 00158 break; 00159 } 00160 /*** Note that sigreturn updates as->pc ***/ 00161 /********************************************/ 00162 case ASYS_sigreturn: { 00163 uint_64t pt[OSF_SIGCONTEXT_SIZE/8]; 00164 char *buf = (char *)pt; 00165 00166 data_t d; 00167 data_t adr; 00168 for(int i=0; imem->ld_nbyte(1, &adr, &d); 00171 buf[i] = d.ld(); 00172 } 00173 for(int i=0; i<31; i++) r[i].init(pt[i+4]); 00174 for(int i=0; i<31; i++){ 00175 ev->as->f[i].init(pt[i+37]); 00176 } 00177 ev->as->pc.init(pt[2]); /** Update PC **/ 00178 00179 if(F){ 00180 printf("sigreturn(0x%llx),Npc:0x%llx\n", 00181 r[16].ld(), ev->as->pc.ld()); 00182 } 00183 break; 00184 } 00185 /********************************************/ 00186 case ASYS_close: { 00187 int fd_t = translate_fd(r[16].ld()); 00188 00189 if(fd_t!=0 && fd_t!=1 && fd_t!=2){ 00190 ret = close(fd_t); 00191 r[0].init(ret); 00192 } 00193 r[19].init(0); 00194 if(F){ 00195 printf("close(%lld(%d)) = %lld\n", 00196 r[16].ld(), fd_t, ret); 00197 } 00198 break; 00199 } 00200 /********************************************/ 00201 case ASYS_getpagesize: { 00202 ret = 8192; /* getpagesize(); */ 00203 r[0].init(ret); 00204 r[19].init(0); 00205 if(F){ 00206 printf("getpagesize() = 0x%llx\n", ret); 00207 } 00208 break; 00209 } 00210 /********************************************/ 00211 case ASYS_sigprocmask: { 00212 ret = 0; 00213 r[0].init(ret); 00214 r[19].init(ret); 00215 if(F){ 00216 printf("%8lld: sigprocmask(%lld,%llx) = %lld\n", 00217 ev->e->retired_inst, r[16].ld(), 00218 r[17].ld(), ret); 00219 } 00220 break; 00221 } 00222 /********************************************/ 00223 case ASYS_getrusage: { // Not Checked 00224 struct rusage ru; 00225 // ret=getrusage((enum __rusage_who)r[16].ld(), 00226 ret=getrusage((int)r[16].ld(), 00227 &ru); 00228 00229 for(int i=0; imem->st_nbyte(1, &adr, &dat); 00233 } 00234 00235 r[0].init(ret); 00236 r[19].init(0); 00237 00238 if(F){ 00239 printf("getrusage(%lld, %llx)=%lld\n", 00240 r[16].ld(), r[17].ld(), ret); 00241 } 00242 break; 00243 } 00244 /********************************************/ 00245 case ASYS_gettimeofday:{ 00246 r[19].init(0); 00247 if(F){ 00248 printf("gettimeofday(%lld,%llx) = %lld\n", 00249 r[16].ld(), r[17].ld(), ret); 00250 } 00251 break; 00252 } 00253 /********************************************/ 00254 case ASYS_fcntl: { 00255 ret = 0; 00256 r[0].init(ret); 00257 r[19].init(0); 00258 if(F){ 00259 printf("fcntl(%lld,%llx) = %lld\n", 00260 r[16].ld(), r[17].ld(), ret); 00261 } 00262 break; 00263 } 00264 /********************************************/ 00265 case ASYS_sigaction: { 00266 ret = 0; 00267 r[0].init(ret); 00268 r[18].init(r[17].ld()); 00269 r[19].init(0); 00270 if(F){ 00271 printf("sigaction(%llx,%llx,%llx,%llx)", 00272 r[16].ld(), r[17].ld(), 00273 r[18].ld(), r[19].ld()); 00274 printf(" = %lld\n", ret); 00275 } 00276 break; 00277 } 00278 /********************************************/ 00279 case ASYS_osf_getsysinfo: { 00280 ret = 0; 00281 r[0].init(ret); 00282 r[19].init(0); 00283 if(F){ 00284 printf("osf_getsysinfo(%llx,%llx,%llx,%llx)", 00285 r[16].ld(), r[17].ld(), 00286 r[18].ld(), r[19].ld()); 00287 printf(" = %lld\n", ret); 00288 } 00289 break; 00290 } 00291 /********************************************/ 00292 case ASYS_osf_setsysinfo: { 00293 ret = 0; 00294 r[0].init(ret); 00295 // r[20]= ret; 00296 r[19].init(0); 00297 if(F){ 00298 printf("osf_setsysinfo(%llx,%llx,%llx,%llx)", 00299 r[16].ld(), r[17].ld(), 00300 r[18].ld(), r[19].ld()); 00301 printf(" = %lld\n", ret); 00302 } 00303 break; 00304 } 00305 /********************************************/ 00306 case ASYS_getuid: { 00307 ret = getuid(); 00308 r[0].init(ret); 00309 r[19].init(0); 00310 r[20].init(geteuid()); 00311 if(F){ 00312 printf("getuid() = %lld\n", ret); 00313 } 00314 break; 00315 } 00316 /********************************************/ 00317 case ASYS_getgid: { 00318 ret = getgid(); 00319 r[0].init(ret); 00320 r[19].init(0); 00321 r[20].init(getegid()); 00322 if(F){ 00323 printf("getgid(0x%llx) = %lld\n", 00324 r[16].ld(), ret); 00325 } 00326 break; 00327 } 00328 /********************************************/ 00329 case ASYS_brk: { 00330 ret = r[16].ld(); 00331 r[0].init(ret); 00332 r[19].init(0); 00333 if(F){ 00334 printf("brk(0x%llx) = %llx\n", 00335 r[16].ld(), ret); 00336 } 00337 break; 00338 } 00339 /********************************************/ 00340 case ASYS_getpid: { 00341 ret = getpid(); 00342 r[0].init(ret); 00343 r[19].init(0); 00344 if(F){ 00345 printf("getpid() = %llx\n", ret); 00346 } 00347 break; 00348 } 00349 /********************************************/ 00350 case ASYS_fstat: { 00351 int fd_t = translate_fd(r[16].ld()); 00352 00353 struct stat sbuf; 00354 ret = fstat(fd_t, &sbuf); 00355 00356 struct osf_statbuf asbuf; 00357 memset(&asbuf,0,sizeof(struct osf_statbuf)); 00358 asbuf.a_st_dev = sbuf.st_dev; 00359 asbuf.a_st_ino = sbuf.st_ino; 00360 asbuf.a_st_mode = sbuf.st_mode; 00361 asbuf.a_st_nlink = sbuf.st_nlink; 00362 asbuf.a_st_uid = sbuf.st_uid; 00363 asbuf.a_st_gid = sbuf.st_gid; 00364 asbuf.a_st_rdev = sbuf.st_rdev; 00365 asbuf.a_st_size = sbuf.st_size; 00366 asbuf.a_st_atime = sbuf.st_atime; 00367 asbuf.a_st_mtime = sbuf.st_mtime; 00368 asbuf.a_st_ctime = sbuf.st_ctime; 00369 asbuf.a_st_blksize = sbuf.st_blksize; 00370 asbuf.a_st_blocks = sbuf.st_blocks; 00371 00372 char *buf = (char *)&asbuf; 00373 00374 for(int i=0; imem->st_nbyte(1, &adr, &dat); 00380 } 00381 00382 r[0].init(ret); 00383 r[19].init(0); 00384 if(F){ 00385 printf("fstat(logic %lld(real %d), 0x%llx)", 00386 r[16].ld(),fd_t, r[17].ld()); 00387 printf(" = %lld\n", ret); 00388 } 00389 break; 00390 } 00391 /********************************************/ 00392 case ASYS_ioctl: { 00393 int fd_t = translate_fd(r[16].ld()); 00394 00395 switch(r[17].ld()){ 00396 case 0x40067408: // OSF_TIOCGRETP 00397 { 00398 struct osf_sgttyb { 00399 uint_08t sg_ispeed; /* input speed */ 00400 uint_08t sg_ospeed; /* output speed */ 00401 uint_08t sg_erase; /* erase char */ 00402 uint_08t sg_kill; /* kill char */ 00403 uint_16t sg_flags; /* mode flags */ 00404 }; 00405 00406 struct termios lbuf; 00407 ret = tcgetattr(fd_t, &lbuf); 00408 00409 /*** store 6 byte, value of 0 ***/ 00410 for(int i=0; i<6; i++){ 00411 data_t adr; adr.init(r[18].ld()+i); 00412 data_t dat; dat.init(0); 00413 ev->mem->st_nbyte(1, &adr, &dat); 00414 } 00415 00416 if(ret!=-1){ 00417 r[0].init(ret); 00418 r[19].init(0); // A3 00419 } 00420 else{ 00421 r[0].init(errno); 00422 r[19].init(ret); 00423 } 00424 break; 00425 } 00426 00427 default: 00428 ret = 0; 00429 r[19].init(ret); 00430 if(F) printf("*** ioctl default\n"); 00431 break; 00432 } 00433 00434 if(F){ 00435 printf("ioctl(logic%lld(r%d),0x%llx,0x%llx)", 00436 r[16].ld(), fd_t, 00437 r[17].ld(), r[18].ld()); 00438 printf(" = %llx\n", ret); 00439 } 00440 break; 00441 } 00442 /********************************************/ 00443 case ASYS_read: { 00444 char *buf = (char *)calloc(1, r[18].ld()); 00445 if(buf==NULL){ 00446 printf("*** malloc error: "); 00447 printf("in syscall.cc::read\n"); 00448 } 00449 00450 int fd_t = translate_fd(r[16].ld()); 00451 if(ev->sc->fd_stdin_flag && fd_t==0) 00452 fd_t=ev->sc->fd_stdin; /* STDIN */ 00453 00454 ret = read(fd_t, buf, r[18].ld()); 00455 00456 // This is better. & 00457 // simple scalar imple! 00458 /* for(int i=0; imem->st_nbyte(1, &adr, &dat); 00464 } 00465 r[0].init(ret); 00466 r[19].init(0); 00467 free(buf); 00468 00469 if(F){ 00470 printf("read(logic %lld(real%d),%llx,0x%llx)", 00471 r[16].ld(), 00472 fd_t, r[17].ld(), r[18].ld()); 00473 printf(" = %llx\n", ret); 00474 } 00475 break; 00476 } 00477 /********************************************/ 00478 case ASYS_write: { 00479 char *buf = (char *)malloc(r[18].ld()); 00480 if(buf==NULL){ 00481 printf("*** malloc error: "); 00482 printf("in syscall.cc::write\n"); 00483 } 00484 00485 for(int i=0; i<(int)r[18].ld(); i++){ 00486 data_t d; 00487 data_t adr; 00488 adr.init(r[17].ld()+i); 00489 ev->mem->ld_nbyte(1, &adr, &d); 00490 buf[i] = d.ld(); 00491 } 00492 00493 int fd_t = translate_fd(r[16].ld()); 00494 00495 ret = write(fd_t, (void *)buf, 00496 (long)r[18].ld()); 00497 r[0].init(ret); 00498 r[19].init(0); 00499 free(buf); 00500 00501 if(F){ 00502 printf("write(%lld(%d), 0x%llx, %lld)=%lld\n", 00503 r[16].ld(), 00504 fd_t, r[17].ld(), r[18].ld(), ret); 00505 } 00506 break; 00507 } 00508 /********************************************/ 00509 case ASYS_lseek: { 00510 int fd_t = translate_fd(r[16].ld()); 00511 if(ev->sc->fd_stdin_flag && fd_t==0) 00512 fd_t=ev->sc->fd_stdin; /* STDIN */ 00513 00514 ret = lseek(fd_t, r[17].ld(), r[18].ld()); 00515 if(ret==-1){ 00516 r[0].init(errno); 00517 r[19].init(~0); 00518 } 00519 else{ 00520 r[0].init(ret); 00521 r[19].init(0); 00522 } 00523 if(F){ 00524 printf("lseek(logic%lld(real%d),%lld,%lld)\n", 00525 r[16].ld(), fd_t, 00526 r[17].ld(), r[18].ld()); 00527 printf(" = %llx\n", ret); 00528 } 00529 break; 00530 } 00531 /********************************************/ 00532 case ASYS_getrlimit: { 00533 ret = 0; 00534 r[19].init(ret); 00535 if(F){ 00536 printf("%8lld: getrlimit(%lld,%lld,%lld)", 00537 ev->e->retired_inst, r[16].ld(), 00538 r[17].ld(), r[18].ld()); 00539 printf(" = %llx\n", ret); 00540 } 00541 break; 00542 } 00543 /********************************************/ 00544 case ASYS_setrlimit: { 00545 ret = 0; 00546 r[19].init(ret); 00547 if(F){ 00548 printf("setrlimit(%lld,%lld,%lld) = %lld\n", 00549 r[16].ld(), 00550 r[17].ld(), r[18].ld(), ret); 00551 } 00552 break; 00553 } 00554 /********************************************/ 00555 case ASYS_exit: { 00556 ret = 0; 00557 running = 0; 00558 if(F){ 00559 printf("%8lld: exit() = %lld\n", 00560 ev->e->retired_inst, ret); 00561 } 00562 break; 00563 } 00564 default: { 00565 printf("systemcall not implemented!!: %lld\n", 00566 r[0].ld()); 00567 r[0].init(0); 00568 r[19].init((uint_64t)-1); 00569 } 00570 } 00571 fflush(stdout); 00572 } 00573 /************************************************/ ------------------------------------------------------------ file name: define.h 00001 /*** Yet Another Alpha Processor Simulator ***/ 00002 /*** in C++ since 2002-05-15 by Kenji KISE ***/ 00003 /************************************************/ 00004 #include 00005 #include 00006 #include 00007 #include 00008 #include 00009 #include 00010 #include 00011 #include 00012 #include 00013 #include 00014 #include 00015 #include 00016 #include 00017 #include 00018 00019 /* 1. Type Definition */ 00020 /************************************************/ 00021 typedef signed char int_08t; 00022 typedef signed short int_16t; 00023 typedef signed int int_32t; 00024 typedef signed long long int_64t; 00025 typedef unsigned char uint_08t; 00026 typedef unsigned short uint_16t; 00027 typedef unsigned int uint_32t; 00028 typedef unsigned long long uint_64t; 00029 00030 typedef uint_32t INST_TYPE; 00031 typedef uint_64t ADDR_TYPE; 00032 typedef uint_64t DATA_TYPE; 00033 00034 00035 /* 2. Constant Definition */ 00036 /************************************************/ 00037 #define NAME "SimAlpha Release" 00038 #define VER "Version 1.1.24 2003-08-14" 00039 00040 #define DEF_FILE_NAME "aout.txt" 00041 #define BLOCK_SIZE 0x00002000 /* 8KB page */ 00042 #define BLOCK_TABLE_SIZE 0x00080000 /* page size*/ 00043 #define BLOCK_MASK 0x00001fff /* page mask*/ 00044 #define BLOCK_MASK_BIT 13 /* mask bit */ 00045 #define DATA_T_SIZE 8 /* size of data_t */ 00046 00047 /** for AMASK op and IMPLVER op **/ 00048 #define IMPLEMENTATION_VERSION 2 00049 #define CPU_FEATURE_MASK 0x0000000000000107ull 00050 00051 #define FD_MAPPING_MAX 128 /* read/write */ 00052 #define OSF_SIGCONTEXT_SIZE 568 /* in byte */ 00053 #define OSF_FSTAT_SIZE 80 /* in byte */ 00054 #define OSF_RUSAGE_SIZE 72 /* in byte */ 00055 #define OPTION_MAX 30 /* max options */ 00056 00057 /** for systemcall implementation **/ 00058 /** I implement one used for SPEC CPU2000. **/ 00059 /************************************************/ 00060 #define ASYS_exit 1 00061 #define ASYS_read 3 00062 #define ASYS_write 4 00063 #define ASYS_close 6 00064 #define ASYS_unlink 10 00065 #define ASYS_brk 17 00066 #define ASYS_lseek 19 00067 #define ASYS_getpid 20 00068 #define ASYS_getuid 24 00069 #define ASYS_open 45 00070 #define ASYS_getgid 47 00071 #define ASYS_sigprocmask 48 00072 #define ASYS_ioctl 54 00073 #define ASYS_getpagesize 64 00074 #define ASYS_stat 67 00075 #define ASYS_mmap 71 00076 #define ASYS_munmap 73 00077 #define ASYS_fstat 91 00078 #define ASYS_fcntl 92 00079 #define ASYS_sigreturn 103 00080 #define ASYS_gettimeofday 116 00081 #define ASYS_getrusage 117 00082 #define ASYS_rename 128 00083 #define ASYS_getrlimit 144 00084 #define ASYS_setrlimit 145 00085 #define ASYS_sigaction 156 00086 #define ASYS_getdirentries 159 00087 #define ASYS_UNIMPLEMENT 226 00088 #define ASYS_osf_getsysinfo 256 00089 #define ASYS_osf_setsysinfo 257 00090 00091 /** Table C-6: Opcode Summary **/ 00092 /** by Alpha Architecture Handbook V.4 **/ 00093 /************************************************/ 00094 /** 0x00 PALcode instruction(CALL_PAL) **/ 00095 /** 0x08 load address instruction **/ 00096 /** 0x09 load address high instruction **/ 00097 /** 0x10 Integer arithmetic instruction **/ 00098 /** 0x11 Integer logical instruction **/ 00099 /** 0x12 Integer shift instruction **/ 00100 /** 0x13 Integer multiply instruction **/ 00101 /** 0x14 Integer to floating-point register **/ 00102 /** 0x15 VAX floating-point instruction **/ 00103 /** 0x16 IEEE floating-point instruction **/ 00104 /** 0x17 Floating-point instruction **/ 00105 /** 0x18 Miscellaneous instruction **/ 00106 /** 0x1a Jump instruction **/ 00107 /** 0x1c Floating-point to integer register **/ 00108 /************************************************/ 00109 #define OP_PAL 0x00 00110 #define OP_LDA 0x08 00111 #define OP_LDAH 0x09 00112 #define OP_INTA 0x10 00113 #define OP_INTL 0x11 00114 #define OP_INTS 0x12 00115 #define OP_INTM 0x13 00116 #define OP_ITFP 0x14 00117 #define OP_FLTV 0x15 00118 #define OP_FLTI 0x16 00119 #define OP_FLTL 0x17 00120 #define OP_MISC 0x18 00121 #define OP_JSR 0x1a 00122 #define OP_FPTI 0x1c 00123 00124 #define BIT0 0x0000000000000001ull 00125 #define BIT1 0x0000000000000002ull 00126 #define BIT2 0x0000000000000004ull 00127 #define BIT3 0x0000000000000008ull 00128 #define BIT4 0x0000000000000010ull 00129 #define BIT5 0x0000000000000020ull 00130 #define BIT6 0x0000000000000040ull 00131 #define BIT7 0x0000000000000080ull 00132 #define BIT8 0x0000000000000100ull 00133 #define BIT9 0x0000000000000200ull 00134 #define BIT10 0x0000000000000400ull 00135 #define BIT11 0x0000000000000800ull 00136 #define BIT12 0x0000000000001000ull 00137 #define BIT15 0x0000000000008000ull 00138 #define BIT20 0x0000000000100000ull 00139 #define BIT31 0x0000000080000000ull 00140 #define BIT63 0x8000000000000000ull 00141 00142 #define EXTND8 0xffffffffffffff00ull 00143 #define EXTND16 0xffffffffffff0000ull 00144 #define EXTND21 0xffffffffffe00000ull 00145 #define EXTND32 0xffffffff00000000ull 00146 #define MASK08 0x00000000000000ffull 00147 #define MASK16 0x000000000000ffffull 00148 #define MASK21 0x00000000001fffffull 00149 #define MASK32 0x00000000ffffffffull 00150 00151 #define ZAP0 0xffffffffffffff00ull 00152 #define ZAP1 0xffffffffffff00ffull 00153 #define ZAP2 0xffffffffff00ffffull 00154 #define ZAP3 0xffffffff00ffffffull 00155 #define ZAP4 0xffffff00ffffffffull 00156 #define ZAP5 0xffff00ffffffffffull 00157 #define ZAP6 0xff00ffffffffffffull 00158 #define ZAP7 0x00ffffffffffffffull 00159 00160 /** for instruction.cc **/ 00161 #define MSK1 0x3e 00162 #define MSK2 0x3c 00163 #define MSK3 0x38 00164 #define MSK4 0x30 00165 00166 00167 /* 4. structure and class definition */ 00168 /************************************************/ 00169 /*** Used in syscall.c SYS_fstat ***/ 00170 struct osf_statbuf{ 00171 uint_32t a_st_dev; 00172 uint_32t a_st_ino; 00173 uint_32t a_st_mode; 00174 uint_16t a_st_nlink; 00175 uint_16t a_pad0; 00176 uint_32t a_st_uid; 00177 uint_32t a_st_gid; 00178 uint_32t a_st_rdev; 00179 uint_32t a_pad1; 00180 uint_64t a_st_size; 00181 uint_32t a_st_atime; 00182 uint_32t a_st_spare1; 00183 uint_32t a_st_mtime; 00184 uint_32t a_st_spare2; 00185 uint_32t a_st_ctime; 00186 uint_32t a_st_spare3; 00187 uint_32t a_st_blksize; 00188 uint_32t a_st_blocks; 00189 uint_32t a_st_gennum; 00190 uint_32t a_st_spare4; 00191 }; 00192 00193 /************************************************/ 00194 class Env{ 00195 public: 00196 class system_config *sc; 00197 class evaluation_result *e; 00198 class debug *deb; 00199 class system_manager *sys; 00200 class memory_system *mem; 00201 class architecture_state *as; 00202 }; 00203 00204 /************************************************/ 00205 class system_config{ 00206 public: 00207 char program_name[512]; 00208 uint_64t end_tc; 00209 int verbose_interval; 00210 int debug_flag; 00211 int syscall_flag; 00212 int simple_result; 00213 int fd_adjust; 00214 int fd_stdin_flag; 00215 int fd_stdin; /* file descripter for STDIN */ 00216 system_config(char *, char**); 00217 }; 00218 00219 /************************************************/ 00220 class evaluation_result{ 00221 public: 00222 uint_64t retired_inst; 00223 int used_memory_block; 00224 time_t time_begin; /* start time stamp */ 00225 struct timeval tp; /* start time stamp */ 00226 struct timezone tzp; /* start time stamp */ 00227 evaluation_result(); 00228 }; 00229 00230 /************************************************/ 00231 class data_t{ 00232 uint_64t value; 00233 public: 00234 int cmov; 00235 uint_64t ld(); 00236 int st(uint_64t); 00237 int init(uint_64t); 00238 }; 00239 00240 /************************************************/ 00241 class architecture_state{ 00242 Env *ev; 00243 public: 00244 data_t pc; /* program counter */ 00245 data_t r[32]; /* general purpose regs */ 00246 data_t f[32]; /* floating point regs */ 00247 uint_64t rr(int); /* register read */ 00248 architecture_state(Env*); 00249 }; 00250 00251 /************************************************/ 00252 class main_memory{ 00253 Env *ev; 00254 data_t *block_table[BLOCK_TABLE_SIZE]; 00255 data_t *allocblock(data_t *); 00256 public: 00257 void ld_8byte(data_t *, data_t *); 00258 void st_8byte(data_t *, data_t *, DATA_TYPE); 00259 main_memory(Env*); 00260 }; 00261 00262 /************************************************/ 00263 class memory_system{ 00264 Env *ev; 00265 class main_memory *mm; 00266 public: 00267 void ld_8byte(data_t *, data_t *); 00268 void st_8byte(data_t *, data_t *, DATA_TYPE); 00269 void ld_inst(data_t *, INST_TYPE *); 00270 void ld_nbyte(int, data_t *, data_t *); 00271 void st_nbyte(int, data_t *, data_t *); 00272 ~memory_system(); 00273 memory_system(Env*); 00274 }; 00275 00276 /************************************************/ 00277 class system_manager{ 00278 Env *ev; 00279 /* File Descriptor Mapping Table */ 00280 DATA_TYPE fd_table[FD_MAPPING_MAX]; 00281 /* Unique Data for rduniq & wruniq inst */ 00282 DATA_TYPE uniq; 00283 public: 00284 int running; /* chip is running ? */ 00285 void execute_pal(class instruction*); 00286 int translate_fd(DATA_TYPE); 00287 system_manager(Env*); 00288 }; 00289 00290 /************************************************/ 00291 class debug{ 00292 Env *ev; 00293 public: 00294 debug(Env*); 00295 void debugmode(); 00296 }; 00297 00298 /************************************************/ 00299 class instruction{ 00300 Env *ev; 00301 INST_TYPE ir; /* 32bit instruction code */ 00302 int Op; /* Opcode field */ 00303 int RA; /* Ra field of the inst */ 00304 int RB; /* Rb field of the inst */ 00305 int RC; /* Rc field of the inst */ 00306 int ST; /* store inst ? */ 00307 int LD; /* load inst ? */ 00308 int CM; /* CMOV inst ? */ 00309 int LA; /* load address inst ? */ 00310 int BR; /* branch inst ? */ 00311 int Ai; /* Rav is immediate ? */ 00312 int Bi; /* Rbv is immediate ? */ 00313 int Af; /* Rav from floating-reg ? */ 00314 int Bf; /* Rbv from floating-reg ? */ 00315 int WF; /* Write to the f-reg ? */ 00316 int WB; /* Writeback reg index */ 00317 data_t Cpc; /* PC of the instruction */ 00318 data_t Npc; /* PC of the next inst. */ 00319 data_t Imm; /* immediate */ 00320 data_t Adr; /* load & store address */ 00321 data_t Rav; /* Ra */ 00322 data_t Rbv; /* Rb */ 00323 data_t Rcv; /* Rc */ 00324 public: 00325 int Fetch(data_t*); 00326 int Fetch(data_t*, INST_TYPE); 00327 int Slot(); 00328 int Rename(); 00329 int Issue(); 00330 int RegisterRead(); 00331 int Execute(data_t*); 00332 int Memory(); 00333 int WriteBack(); 00334 INST_TYPE get_ir(); 00335 instruction(Env*); 00336 }; 00337 00338 /************************************************/ 00339 class simple_chip{ 00340 public: 00341 Env *ev; 00342 instruction *p; 00343 simple_chip(char*, char**); 00344 ~simple_chip(); 00345 int step(); 00346 }; 00347 00348 /************************************************/ 00349 struct alpha_stat{ /*** for syscall.cc ***/ 00350 uint_64t a_st_dev; 00351 uint_32t a_st_ino; 00352 int_32t a___pad1; 00353 uint_32t a_st_mode; 00354 uint_32t a_st_nlink; 00355 uint_32t a_st_uid; 00356 uint_32t a_st_gid; 00357 uint_64t a_st_rdev; 00358 int_64t a_st_size; 00359 int_64t a_st_atime; 00360 int_64t a_st_mtime; 00361 int_64t a_st_ctime; 00362 uint_32t a_st_blocks; 00363 int_32t a___pad2; 00364 uint_32t a_st_blksize; 00365 uint_32t a_st_flags; 00366 uint_32t a_st_gen; 00367 int_32t a___pad3; 00368 int_64t a___unused[4]; 00369 }; 00370 00371 00372 /* 5. function prototypes */ 00373 /************************************************/ 00374 extern void set_st_data(INST_TYPE, data_t*, 00375 data_t*, data_t*, 00376 DATA_TYPE*); 00377 extern void set_ld_data(INST_TYPE, data_t*, 00378 data_t*, data_t*); 00379 extern void print_evaluation_result(Env*); 00380 extern void usage(); 00381 extern uint_64t map_s(unsigned int); 00382 extern INST_TYPE cmov_ir_create(INST_TYPE); 00383 extern int ALU(INST_TYPE, data_t*, 00384 data_t*, data_t*); 00385 extern int BRU(INST_TYPE, data_t*, data_t*, 00386 data_t*, data_t*); 00387 extern void option_from_file(char**, char*); 00388 00389 extern int execute_cmovb(instruction*, 00390 architecture_state*); 00391 extern void house_keeper(Env*); 00392 extern int nbyte(INST_TYPE); 00393 extern "C" int simple_cpu(int, uint_64t*); 00394 extern uint_64t get_hex(char*); 00395 /************************************************/