**** Deadline is Extended to July 10, 2009 ***

Workshop on Ultra Performance and Dependable Acceleration Systems (UPDAS)

held in conjunction with PDCAT'09

8th-11th, Dec. 2009, @Hiroshima, Japan

http://www.arch.cs.titech.ac.jp/updas/

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 PURPOSE AND SCOPE
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Accelerators such as GPUs, Cell/B.E., and kinds of many-core architecture are pointed out, because of its high computational performance for specific applications. In order to employ the performance, computational models and tools are necessary. And dependability is also important for execution of applications on complicated systems with accelerators. We have to take a wide perspective, such as hardware architecture, middle-ware, and application on the issues.

In this workshop, we focus on hardware architecture, system software, operating system and etc. for computing systems with accelerators. As next generation computing system, we address state-of-art issues for improvement of ultra performance and dependability. And also this workshop welcomes paper submissions about practical implementations, benchmarks, and dependability related accelerators.

Topics of particular interest include, but are not limited to:

    * Accelerators for high-performance computing
    * Program distribution to accelerators
    * Multi/Many-core architecture for accelerating computation
    * Dependable environment on accelerators
    * Operating systems for accelerators
    * Programming Support tools and programming models for accelerators
    * Benchmarks for performance and dependability of parallel programming
    * Embedded systems with accelerating architectures
    * Practical implementations with accelerating architectures
    * Network on Chip for accelerating architectures 

The workshop also aims at providing a forum for researchers and engineers from academia and industry, as well as work-in-progress papers or case studies related to the issues.

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 SUBMISSION OF PAPERS
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People who would like to participate in this event are invited to submit a paper (or an extended abstract) to the workshop general chair via email (updas_at_arch.cs.titech.ac.jp*1). Submitted papers should follow the IEEE conference format and must not exceed 6 pages in length. Papers must be submitted in PDF format. Papers that are excessively long may be rejected without review.

    *1: please replace "_at_" to "@" 

Short papers about 2-3 pages for "work-in-progress" research are also welcome. In that case, please indicate that in your submitting mail.

All accepted papers will be included in conference proceedings of PDCAT'09, which will be published by IEEE Computer Society Press and automatically included in the IEEE Xplore digital library. At least one author of an accepted paper must register at the conference site and present the paper at the workshop.

We are possibly considering a plan to support a part of travel expense.

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 IMPORTANT DATES
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Deadline for submission	 Jul. 10, 2009
Acceptance notification	 Aug. 10, 2009
Camera-ready		 Sep. 1, 2009

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 ORGANIZING COMMITTEE
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 General Chair
  Hironori Nakajo, Tokyo University of Agriculture and Technology, Japan 
 Program Committee Chair
  Tsutomu Yoshinaga, The University of Electro-Communications, Japan 
 Publication Chair
  Takefumi Miyoshi, Tokyo Institute of Technology/JST, Japan 
 Publicity Chair
  Kenji Kise, Tokyo Institute of Technology, Japan 

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PROGRAM COMMITTEE
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 Tsutomu Yoshinaga, The University of Electro-Communications, Japan
 Takefumi Miyoshi, Tokyo Institute of Technology/JST, Japan
 Aaron Smith, Microsfot, USA
 Atsushi Kubota, Hiroshima City University, Japan
 H. Peter Hofstee, IBM, USA
 Mateo Valero, Technical University of Catalonia, Spain
 Naoya Maruyama, Tokyo Institute of Technology, Japan
 Shinpei Kato, The University of Tokyo, Japan
 Shoichi Hirasawa, The University of Electro-Communications, Japan
 Takahiro Katagiri, The University of Tokyo, Japan
 Takuya Araki, NEC Corp., Japan
 Tor M. Aamodt, University of British Columbia, Canada
 Toshinori Sato, Fukuoka University, Japan