00001
00002
00003
00004 #ifndef _NETWORK_H_
00005 #define _NETWORK_H_
00006
00007 #include <ctype.h>
00008 #include <stdio.h>
00009 #include <stdlib.h>
00010 #include <signal.h>
00011 #include "core/define.h"
00012 #include "assert.h"
00013 #include "list.h"
00014
00015 #define MC_NAME "SimMc M-Core alpha : Many-Core and NoC Simulator"
00016 #define MC_VER "v1.0 2010-03-30"
00017
00018 #define MC_LIB_VER "1.0.0"
00019
00020
00021
00022
00023 #define MP_MMAP_BASE 0x00000100
00024
00025 #define MP_MMAP_KEYCODE (MP_MMAP_BASE + 0x00)
00026 #define MP_MMAP_LCD (MP_MMAP_BASE + 0x04)
00027 #define MP_MMAP_BUZZER (MP_MMAP_BASE + 0x08)
00028 #define MP_MMAP_TIMER (MP_MMAP_BASE + 0x0c)
00029 #define MP_MMAP_GPIO_0 (MP_MMAP_BASE + 0xf0)
00030 #define MP_MMAP_GPIO_4 (MP_MMAP_BASE + 0xf4)
00031 #define MP_MMAP_GPIO_8 (MP_MMAP_BASE + 0xf8)
00032 #define MP_MMAP_GPIO_C (MP_MMAP_BASE + 0xfc)
00033
00034
00035
00036
00037 #define SC_MMAP_BASE 0x00000200
00038
00039 #define SC_MMAP_NODE_ID (SC_MMAP_BASE + 0x00)
00040 #define SC_MMAP_NOC_SIZE (SC_MMAP_BASE + 0x04)
00041
00042 #define SC_MMAP_PC (SC_MMAP_BASE + 0x08)
00043 #define SC_MMAP_TIMER (SC_MMAP_BASE + 0x10) // clock
00044 #define SC_MMAP_TIMER_D (SC_MMAP_BASE + 0x14) //
00045
00046 #define SC_MMAP_INST_LOOP (SC_MMAP_BASE + 0x18) // ??? b
00047 #define SC_MMAP_INST_LOOP__ (SC_MMAP_BASE + 0x1c) // ??? nop
00048
00049 #define SC_MMAP_DMA_PUT_REMOTE_ID (SC_MMAP_BASE + 0x20)
00050 #define SC_MMAP_DMA_PUT_REMOTE_ADDR (SC_MMAP_BASE + 0x24)
00051 #define SC_MMAP_DMA_PUT_REMOTE_STRIDE (SC_MMAP_BASE + 0x28)
00052 #define SC_MMAP_DMA_PUT_LOCAL_ADDR (SC_MMAP_BASE + 0x2c)
00053 #define SC_MMAP_DMA_PUT_LOCAL_STRIDE (SC_MMAP_BASE + 0x30)
00054 #define SC_MMAP_DMA_PUT_SIZE (SC_MMAP_BASE + 0x34)
00055 #define SC_MMAP_DMA_PUT_CMD (SC_MMAP_BASE + 0x3c)
00056
00057 #define SC_MMAP_DMA_GET_REMOTE_ID (SC_MMAP_BASE + 0x40)
00058 #define SC_MMAP_DMA_GET_REMOTE_ADDR_L (SC_MMAP_BASE + 0x44)
00059 #define SC_MMAP_DMA_GET_REMOTE_ADDR_H (SC_MMAP_BASE + 0x48)
00060 #define SC_MMAP_DMA_GET_LOCAL_ADDR (SC_MMAP_BASE + 0x4c)
00061 #define SC_MMAP_DMA_GET_SIZE (SC_MMAP_BASE + 0x50)
00062 #define SC_MMAP_DMA_GET_REMOTE_STRIDE (SC_MMAP_BASE + 0x54)
00063 #define SC_MMAP_DMA_GET_LOCAL_STRIDE (SC_MMAP_BASE + 0x58)
00064 #define SC_MMAP_DMA_GET_CMD (SC_MMAP_BASE + 0x5c)
00065
00066 #define SC_MMAP_DMA_FLAG (SC_MMAP_BASE + 0x80) // for ack/nack
00067
00068 #define SC_MMAP_NODE_SERVER (SC_MMAP_BASE + 0x100)
00069 #define SC_MMAP_INCC_WRIGHT_ADDR (SC_MMAP_BASE + 0x104)
00070
00071
00072
00073 #define GMEM_BASE 0x00000200
00074
00075 #define GMEM_DMA_GET_REMOTE_ID (GMEM_BASE + 0x40)
00076 #define GMEM_DMA_GET_REMOTE_ADDR_L (GMEM_BASE + 0x44)
00077 #define GMEM_DMA_GET_REMOTE_ADDR_H (GMEM_BASE + 0x48)
00078 #define GMEM_DMA_GET_LOCAL_ADDR_L (GMEM_BASE + 0x4c)
00079 #define GMEM_DMA_GET_LOCAL_ADDR_H (GMEM_BASE + 0x50)
00080 #define GMEM_DMA_GET_SIZE (GMEM_BASE + 0x54)
00081 #define GMEM_DMA_GET_REMOTE_STRIDE (GMEM_BASE + 0x58)
00082 #define GMEM_DMA_GET_CMD (GMEM_BASE + 0x5c)
00083
00084
00085 #define ENV_FLIT_VIEW "FLITVIEW"
00086
00087 #define DEF_RANK_X 4
00088 #define DEF_RANK_Y 4
00089 #define MAX_ROW 127
00090 #define MAX_COL 127
00091 #define MAX_NODE (MAX_ROW * MAX_COL)
00092
00093 #define MAX_LOG_MODE 5
00094 #define DEF_MAX_CYCLE MAX_CYCLE_DEF
00095
00096 #define MAX_FLITS_PER_PACKET 11
00097 #define MAX_MEM_LATENCY (1<<8 - 1)
00098
00099 #define DEFAULT_STRIDE 4
00100
00101 #define IDX(id) ((int)(((id) >> 8) & 0xff))
00102 #define IDY(id) ((int)((id) & 0xff))
00103
00104 #define print_error(...) \
00105 fprintf(stderr, "## ERROR: " __VA_ARGS__)
00106 #define print_exit(...) \
00107 (print_error(__VA_ARGS__), exit(1))
00108
00109 #define round_robin(__i,last, MAX) \
00110 for(int __i=((last)+1>=(MAX))?0:(last)+1, __t=0; \
00111 __t<(MAX); \
00112 __i=(__i+1>=(MAX))?0:__i+1, __t++)
00113
00114 #define opposite(x) \
00115 ((x) == N ? S : \
00116 ((x) == E ? W : \
00117 ((x) == S ? N : \
00118 ((x) == W ? E : \
00119 0xffff))))
00120
00121 #define LOG1_HEADER \
00122 "## cycle dma_put src-id dst-id src-addr dst-addr byte stride\n" \
00123 "## cycle dfma_put_4b src-id dst-id data dst-addr\n" \
00124 "## cycle recieve-header id stride\n" \
00125 "## cycle recieve-addr id dst-addr\n" \
00126 "## cycle receive-body id data\n"
00127
00128 typedef unsigned short uint016_t;
00129
00133 enum {
00134 FLIT_VALID = 1 << 5,
00135 FLIT_HEADER = 1 << 4,
00136 FLIT_ADDR = 1 << 3,
00137 FLIT_STRIDE = 1 << 2,
00138 FLIT_DATA = 1 << 1,
00139 FLIT_TAILER = 1 << 0
00140 };
00141
00145 enum {
00146 N,
00147 E,
00148 S,
00149 W,
00150 C,
00151 NUM_DIRECTION,
00152 };
00153
00154 enum {
00155 DMAFLAG_NA,
00156 DMAFLAG_ACK,
00157 DMAFLAG_NACK,
00158 };
00159
00160 enum {
00161 NODE_COMP,
00162 NODE_SERVER,
00163 NODE_MEM,
00164 NODE_PATH,
00165 };
00166
00167 typedef struct {
00168 uint032_t clk, phase;
00169 uint032_t y, x;
00170 uint032_t direction;
00171 uint032_t site;
00172 uint032_t data;
00173 } log_t;
00174
00175 typedef struct {
00176 uint032_t clk;
00177 uint008_t type;
00178 uint008_t y;
00179 uint008_t x;
00180 uint008_t dir_and_site;
00181 uint032_t data;
00182 } log5_t;
00183
00184 typedef union {
00185 uint008_t type;
00186 struct {
00187 uint008_t type;
00188 uint016_t coreid;
00189 uint016_t tag;
00190 } header;
00191 struct {
00192 uint008_t type;
00193 uint032_t data;
00194 } body;
00195 } flit_t;
00196
00197 typedef enum {
00198 MC_CHAR,
00199 MC_INT,
00200 MC_FLOAT,
00201 MC_DOUBLE,
00202 } MC_Datatype;
00203
00204 typedef enum {
00205 MC_MAX,
00206 MC_MIN,
00207 MC_SUM,
00208 MC_PROD,
00209 MC_LAND,
00210 MC_BAND,
00211 MC_LOR,
00212 MC_BOR,
00213 MC_LXOR,
00214 MC_BXOR,
00215 MC_MAXLOC,
00216 MC_MINLOC,
00217 } MC_Op;
00218
00219 const flit_t flit_invalid = {0};
00220
00221
00222 typedef Board Core;
00223 class Router;
00224 class Incc;
00225 class Incc32;
00226 class Incc64;
00227 class Node;
00228 class Nodeinfo;
00229 class GMemory;
00230 class Cmdbuf;
00231 class Bitmap;
00232 class Getdata;
00233
00234 class Nodeinfo {
00235 public:
00236 int id;
00237 int type;
00238 int state;
00239 char *filename;
00240 char *option;
00241 Nodeinfo();
00242 };
00243
00244 class Env {
00245 private:
00246 uint phase;
00247 FILE *fp;
00248 int checkarg(int, char **);
00249 ullint gettime();
00250 void print_log4();
00251 void print_log5();
00252 int check_mclib(int, const char *g);
00253
00254 public:
00255 Core *core;
00256 Router *router;
00257 Incc32 *incc32;
00258 Incc64 *incc64;
00259 Node *node;
00260 GMemory *gmem;
00261
00262 Nodeinfo *nodeinfo;
00263 uint032_t *prev_pc;
00264
00265 int add_module;
00266
00267 int incc_activity;
00268 FILE *plot;
00269
00270 int noc_col, noc_row;
00271 int rank_x, rank_y, nocrank;
00272 int nr_node;
00273 int nr_node_comp;
00274 uint debug_mode, log_mode, quiet_mode, server_mode;
00275 ullint maxcycle;
00276 ullint cycle;
00277 char *logfile;
00278 int multicycle;
00279 char path_prefix[128];
00280
00281 Env();
00282 ~Env();
00283 void make_nodeinfo(char *filename);
00284 int initialize(int, char **);
00285 int initialize(void);
00286 void execute();
00287 void finalize();
00288 void print_log();
00289 uint032_t entry2id(int);
00290 int id2entry(uint032_t);
00291 int id2entry(int, int);
00292 int id2id(int, int);
00293 const char *int2type(int type);
00294 void print_flit(flit_t*);
00295
00296 int finishcond();
00297 void core_update();
00298 void memory_update();
00299 void incc_update();
00300 void router_update();
00301 void router_switching();
00302 void comm_update();
00303 void post_update();
00304
00305
00306 };
00307
00308 class Inbuf {
00309 private:
00310 int _head, _tail, _num_entry;
00311 public:
00312 static const int BUF_SIZE = 4;
00313 flit_t buf[BUF_SIZE];
00314
00315 uint008_t request;
00316 Inbuf();
00317 bool isempty();
00318 bool isfull();
00319 int num_entry();
00320 bool deq();
00321 bool enq(flit_t);
00322 flit_t *head();
00323 void rtcomp(uint032_t id);
00324 };
00325
00326 typedef struct {
00327 uint032_t remote_id;
00328 uint032_t remote_addr;
00329 uint032_t remote_stride;
00330 uint032_t local_addr;
00331 uint032_t local_stride;
00332 uint032_t size;
00333 uint032_t reserved;
00334 uint032_t cmd;
00335 } commcmd_t;
00336
00337 class Cmdbuf {
00338 typedef commcmd_t elem_t;
00339 private:
00340 elem_t *buf;
00341 int _head, _tail, _num_entry, nentry;
00342
00343 public:
00344 Cmdbuf(int);
00345 ~Cmdbuf();
00346 bool isempty();
00347 bool isfull();
00348 int num_entry();
00349 bool deq();
00350 bool enq(void*);
00351 void *head();
00352 };
00353
00354 class Incc {
00355 protected:
00356 Env *env;
00357 unsigned long long clock_begin;
00358
00359 public:
00360 int *coreid;
00361
00362 uint008_t irdy, irdy_;
00363 uint008_t ordy, ordy_;
00364
00365 commcmd_t cmd_send;
00366 commcmd_t cmd_recv;
00367
00368
00369 flit_t in;
00370 flit_t inbuf, inbuf_;
00371 flit_t outbuf, _outbuf;
00372 flit_t out;
00373
00374 int dma_type, dma_type_, _dma_type;
00375 int dma_send_state, _dma_send_state;
00376 int dma_send_state_;
00377 uint032_t send_count;
00378
00379 Router *router;
00380
00381 Incc();
00382 virtual ~Incc();
00383 virtual void init(Env*, int) = 0;
00384 virtual void update() = 0;
00385 virtual void comm() = 0;
00386 virtual void print_packet() = 0;
00387 virtual void print_flit() = 0;
00388 };
00389
00390 class Incc32 : public Incc {
00391
00392 int nackentry;
00393
00394 commcmd_t _getreqbuf;
00395 Cmdbuf *getreqbuf;
00396 Bitmap *nackmap;
00397
00398
00399 static const unsigned int GETREQBUF_SIZE = 2;
00400
00401 public:
00402
00403 enum {
00404 INIT,
00405 ACK_FH, ACK_FA, ACK_FD,
00406 NACK_FH, NACK_FA, NACK_FD,
00407 PUT_FH, PUT_FA, PUT_FS, PUT_FD,
00408 GET_FH, GET_FA, GET_FS, GET_FD,
00409 PUT64_FH, PUT64_FAL, PUT64_FAH, PUT64_FD,
00410 NUM_STATE,
00411 };
00412
00413
00414 enum {
00415 DMA_NA,
00416 DMA_PUT,
00417 DMA_GET,
00418 DMA_ACK,
00419 DMA_NACK,
00420 DMA_NUM_CMD,
00421 };
00422
00423 commcmd_t *core_incc_if;
00424
00425 MainMemory *mem;
00426 void plot();
00427 void print_MClib();
00428 const char *int2dmatype(int);
00429 const char *int2state(int);
00430 void print_flit();
00431 void print_packet();
00432
00433 uint032_t *memmap;
00434 void init(Env*, int);
00435 void update();
00436 void comm();
00437
00438 Incc32();
00439 ~Incc32();
00440 };
00441
00442 class Getdata {
00443 static const unsigned int BUF_SIZE = 1024;
00444 static const unsigned int NENTRY = 128;
00445
00446 typedef struct {
00447 uint032_t read_idx;
00448 uint064_t read_addr;
00449 uint032_t size;
00450 uint032_t data[BUF_SIZE];
00451 } getdata_t;
00452
00453 getdata_t getdata[NENTRY];
00454
00455 GMemory *mem;
00456
00457 public:
00458
00459 int _head, _tail, _num_entry, nentry;
00460
00461 Getdata(GMemory*);
00462 bool enq(uint064_t address, uint032_t size);
00463 bool deq();
00464 bool isfull();
00465 bool isempty();
00466 uint032_t nextdata();
00467 };
00468
00469 class Incc64 : public Incc {
00470
00471 int nackentry;
00472
00473 commcmd_t *core_incc_if;
00474
00475 commcmd_t _getreqbuf;
00476 Cmdbuf *getreqbuf;
00477
00478 GMemory *mem;
00479 uint032_t *memmap;
00480
00481 void print_flit();
00482 void print_packet();
00483
00484 Getdata *getdata;
00485
00486 int readable;
00487
00488 unsigned int ready_counter;
00489
00490 public:
00491
00492 enum {
00493 INIT,
00494 GET_FH, GET_FA, GET_FS, GET_FD,
00495 ACK_FH, ACK_FA, ACK_FD,
00496 NACK_FH, NACK_FA, NACK_FD,
00497 NUM_STATE,
00498 };
00499
00500
00501 enum {
00502 DMA_NA,
00503 DMA_null,
00504 DMA_GET,
00505 DMA_ACK,
00506 DMA_NACK,
00507 DMA_NUM_CMD,
00508 };
00509
00510
00511 static const unsigned int GETREQBUF_SIZE = 2;
00512
00513 void init(Env*, int);
00514 void update();
00515 void comm();
00516
00517 Bitmap *nackmap;
00518
00519 const char *int2dmatype(int);
00520 const char *int2state(int);
00521
00522 Incc64();
00523 ~Incc64();
00524 };
00525
00526 class Router {
00527 private:
00528 Env *env;
00529 uint008_t last_send[NUM_DIRECTION];
00530 uint008_t do_round_robin[NUM_DIRECTION];
00531
00532 public:
00533 int id;
00534 Router *router[NUM_DIRECTION - 1];
00535 Incc *incc;
00536 Inbuf in_buf[NUM_DIRECTION];
00537 uint008_t irdy[NUM_DIRECTION];
00538 uint008_t ordy[NUM_DIRECTION];
00539 uint008_t ordy_[NUM_DIRECTION];
00540 flit_t out[NUM_DIRECTION];
00541 flit_t in[NUM_DIRECTION];
00542
00543 Router();
00544 ~Router();
00545 void init(Env*, int);
00546 void update();
00547 void switching();
00548 void comm();
00549 void print(FILE*);
00550 };
00551
00552 class Node {
00553 public:
00554 Core *core;
00555 void *mem;
00556 Router *router;
00557 Incc *incc;
00558 Node();
00559 };
00560
00561 class GMemory {
00562 public:
00563 static const unsigned int GMEM_PAGE_BITS = 12;
00564 static const uint064_t GMEM_PAGE_SIZE = 1llu << GMEM_PAGE_BITS;
00565 static const uint064_t GMEM_PAGE_MASK = GMEM_PAGE_SIZE - 1;
00566 static const unsigned int PAGE_LATENCY = 80;
00567 static const unsigned int READ_LATENCY = 20;
00568
00569 private:
00570 typedef struct {
00571 struct list_head list;
00572 uint064_t pagehead;
00573 uint032_t data[GMEM_PAGE_SIZE/sizeof(uint032_t)];
00574 } page_t;
00575
00576 page_t *newpage(const uint064_t);
00577 uint032_t *setpageentry(const uint064_t);
00578 void delpage(const uint064_t);
00579
00580 uint032_t *pagebuf;
00581 unsigned int latency_counter;
00582
00583 public:
00584 GMemory();
00585 ~GMemory();
00586 struct list_head alist;
00587 uint032_t *getrealaddr(const uint064_t);
00588 void read4b(const uint064_t, uint032_t*);
00589 void write4b(const uint064_t, const uint032_t);
00590 uint032_t *getpagerealaddr(const uint064_t addr);
00591 int pagehit(const uint064_t addr);
00592 };
00593
00594 class Bitmap {
00595 public:
00596 static const unsigned int NOT_FOUND = -1u;
00597
00598 unsigned int *bitmap;
00599 unsigned int nbits;
00600 int words;
00601
00602 Bitmap(unsigned int);
00603 ~Bitmap();
00604 int isclear();
00605 void set(unsigned int);
00606 void reset(unsigned int);
00607 int lsb();
00608 int msb();
00609 static int lsb(unsigned int*, unsigned int);
00610 static int msb(unsigned int*, unsigned int);
00611 static int lsb(unsigned int);
00612 static int msb(unsigned int);
00613 void print();
00614 };
00615
00616 #endif